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author | Christian Geddes <crgeddes@us.ibm.com> | 2019-08-14 17:00:55 -0500 |
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committer | RAJA DAS <rajadas2@in.ibm.com> | 2019-08-26 10:34:22 -0500 |
commit | 793283f013116f450aa0bb39155ba876a83c2dfd (patch) | |
tree | 68943f6cb4f1b7002c0912ddd0d1394e0ea97a72 /src/import/chips/p9/xip/p9_xip_image.h | |
parent | 49f5968198ce3e807a6da58e431d985a8469739d (diff) | |
download | talos-sbe-793283f013116f450aa0bb39155ba876a83c2dfd.tar.gz talos-sbe-793283f013116f450aa0bb39155ba876a83c2dfd.zip |
Update ocmb i2c driver to send address in read command sequence
As part of the register read operation to a ocmb card the spec tells
us to perform 2 commands. The first command is a REGISTER_LATCH cmd
which includes the address of the register you want to read. The 2nd
cmd is a REGISTER_READ command which, according to the spec does not
require the address to be sent again. We found during bringup that
the gemini cards were expecting the address to be sent along with
the REGISTER_READ cmd as well as with the REGISTER_LATCH cmd. Cronus
was doing this in their code so they did not see this problem. As
these address bits will be ignored by explorer cards (per the spec)
it should be benign the include them with the REGISTER_READ cmd.
Change-Id: Ifcade18a290355432df43c0c3e58d6575f1f25b5
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82249
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82257
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/xip/p9_xip_image.h')
0 files changed, 0 insertions, 0 deletions