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author | Claus Michael Olsen <cmolsen@us.ibm.com> | 2018-01-04 21:24:06 -0600 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-02-08 09:39:51 -0500 |
commit | 69f0bcd5c8937fa8cd97d7c2b097e44fd6cf7f26 (patch) | |
tree | 967ffb32892dfc8993b2aa4168c495bfd55ce490 /src/import/chips/p9/utils/imageProcs/p9_tor.C | |
parent | 74c0e5367a4365588ab2583cd58c924df4ea1ebb (diff) | |
download | talos-sbe-69f0bcd5c8937fa8cd97d7c2b097e44fd6cf7f26.tar.gz talos-sbe-69f0bcd5c8937fa8cd97d7c2b097e44fd6cf7f26.zip |
Moving DD specific ring coord from TOR to XIP (step 2)
Step 2 - Producing XIP coordinated DD packaging of the TOR
ring sections.
- Updated ring_apply to produce N number of DD specific .rings
ring sections and which is then assembled using the DD
container API.
Key_Cronus_Test=XIP_REGRESS
HW-ImageBuild-Prereq=42751
- 42751 must be fully merged in Cronus and HB before this
commit (51511) can be merged. This is to avoid a Coreq
situation.
Change-Id: I45a73848f3e8683aae9dcc26fcdf282259c38fcc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51511
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51519
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/utils/imageProcs/p9_tor.C')
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_tor.C | 69 |
1 files changed, 66 insertions, 3 deletions
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C index 45726b2e..8d8af340 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_tor.C +++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C @@ -285,10 +285,10 @@ int get_ring_from_ring_section( void* i_ringSection, // Ring secti int tor_access_ring( void* i_ringSection, // Ring section ptr RingId_t i_ringId, // Ring ID uint8_t i_ddLevel, // DD level - PpeType_t i_ppeType, // SBE, CME, SGPE + PpeType_t i_ppeType, // SBE,CME,SGPE RingVariant_t i_ringVariant, // Base,CC,RL (SBE,CME,SGPE only) uint8_t& io_instanceId, // Instance ID - RingBlockType_t i_ringBlockType, // Single ring, Block + RingBlockType_t i_ringBlockType, // GET_SINGLE_RING,GET_PPE_LEVEL_RINGS,etc void** io_ringBlockPtr, // Ring data buffer uint32_t& io_ringBlockSize, // Size of ring data char* o_ringName, // Ring name @@ -316,6 +316,69 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr torHeader = (TorHeader_t*)i_ringSection; torMagic = be32toh(torHeader->magic); + if (i_dbgl > 0) + { + MY_DBG("TOR header fields\n" + " magic: 0x%08x\n" + " version: %d\n" + " chipType: %d\n" + " ddLevel: 0x%x\n" +#ifdef TORV3_SUPPORT + " numDdLevels: %d\n" +#endif + " size: %d\n" + "API parms\n" + " i_ddLevel: 0x%x\n" + " i_ppeType: %d\n" + " i_ringVariant: %d\n", + torMagic, torHeader->version, torHeader->chipType, + torHeader->ddLevel, +#ifdef TORV3_SUPPORT + torHeader->numDdLevels, +#endif + be32toh(torHeader->size), + i_ddLevel, i_ppeType, i_ringVariant); + + MY_DBG("Dump of first 12 quad-word lines in ring section\n"); + + for (uint8_t iLine = 0; iLine < 12; iLine++) + { + MY_DBG("%04x: %04x %04x %04x %04x %04x %04x %04x %04x\n", + iLine * 16, + (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 0)) >> 48), + (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 0)) >> 32), + (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 0)) >> 16), + (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 0)) >> 0), + (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 1)) >> 48), + (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 1)) >> 32), + (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 1)) >> 16), + (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 1)) >> 0)); + } + } + + if ( torMagic >> 8 != TOR_MAGIC || + torHeader->version == 0 || + torHeader->version > TOR_VERSION || + torHeader->chipType >= NUM_CHIP_TYPES ) + { + MY_ERR("Invalid TOR header:\n" + " magic: 0x%08x\n" + " version: %d\n" + " chipType: %d\n" + " ddLevel: 0x%x (requested ddLevel=0x%x)\n" +#ifdef TORV3_SUPPORT + " numDdLevels: %d\n" +#endif + " size: %d\n", + torMagic, torHeader->version, torHeader->chipType, + torHeader->ddLevel, i_ddLevel, +#ifdef TORV3_SUPPORT + torHeader->numDdLevels, +#endif + be32toh(torHeader->size)); + return TOR_INVALID_MAGIC_NUMBER; + } + #ifdef TORV3_SUPPORT if (torMagic == TOR_MAGIC_HW && torHeader->version < 5) @@ -393,7 +456,7 @@ int tor_access_ring( void* i_ringSection, // Ring section ptr #endif - if ( ( i_ringBlockType == GET_SINGLE_RING ) || // All Magics supported for GET + if ( i_ringBlockType == GET_SINGLE_RING || // All Magics support GET ( i_ringBlockType == PUT_SINGLE_RING && // Can only append to SBE,CME,SGPE ( torMagic == TOR_MAGIC_SBE || torMagic == TOR_MAGIC_CME || |