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| author | Luke C. Murray <murrayl@us.ibm.com> | 2017-11-03 17:23:03 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-12-05 23:09:45 -0500 |
| commit | 62551f8feb3a2b8466241b8ebc2b3dabaae400f7 (patch) | |
| tree | 67d4b7e15b12463066b93172b9067c98a8a09f29 /src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | |
| parent | 871d02a4e2c66e7c0501812abd86a27009cc73e0 (diff) | |
| download | talos-sbe-62551f8feb3a2b8466241b8ebc2b3dabaae400f7.tar.gz talos-sbe-62551f8feb3a2b8466241b8ebc2b3dabaae400f7.zip | |
Adding attribute to turn memory early data on
Performance wants a way to turn memory early data on & off
using just scoms. Adding one attribute to control all the needed
scoms and defaulting everything so that early data is off.
For the L3 disable cp_me by default using scom
Changing the scom cp_me dial to disable cp_me for all systems
after Nimbus DD2.0. This is expected to be the correct setup
for most systems.
We didn't disable the cp_me at the scan, because the scom can
only disable cp_me if ON or allow the scan setting if set OFF. Some
systems might want cp_me enabled by only changing a scom. So the default
is to set cp_me on at the scan and off a the scom. This way only the
scom has to be turned off to enable cp_me.
Also update three scoms in the memory controler that are needed for
early data.
Change-Id: Ib2106ec4b7d26cb084601f2d6eee68833b36d30b
CQ: HW426419
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49261
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49331
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index dcb1a3ca..81583e27 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -557,4 +557,8 @@ attribute tank <name>ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID</name> <value>0x00</value> </entry> + <entry> + <name>ATTR_ENABLE_MEM_EARLY_DATA_SCOM</name> + <value>0x0</value> + </entry> </entries> |
