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authorJoe McGill <jmcgill@us.ibm.com>2016-09-02 12:24:03 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-09-19 00:38:56 -0400
commitbb215a103af37f8aed69ac9482fca7bfb022a066 (patch)
treed85beb1fc5a6c52069a4eee9e7fd7b9ce33addbb /src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
parentf4763c3a97727a97827b5a09c4cfb55f3276fbe6 (diff)
downloadtalos-sbe-bb215a103af37f8aed69ac9482fca7bfb022a066.tar.gz
talos-sbe-bb215a103af37f8aed69ac9482fca7bfb022a066.zip
FIR updates
p9.cme.scan.initfile add CME LFIR settings add EQ pervasive LFIR/XFIR settings p9.npu.scom.initfile update NPU_0/NPU_1 LFIR settings p9.psi.scom.initfile add PSI LFIR settings p9_sbe_scominit add LPC LFIR settings update placeholder for pervasive LFIR/XFIR settings (for Nest/XBUS/MC/OBUS/PCIE) p9_sbe_tp_chiplet_init3 update TP pervasive LFIR settings p9_pcie_config fix bug affecting PHBBAR programming (causing invalid BAR matches) p9_pcie_scominit update PEC LFIR settings p9_setup_bars_defs update MCD LFIR settings Change-Id: I8aaf7f40e96cde2fbd6e44fd0451e0add6584b77 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29197 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29200 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C')
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
index aace2054..f135733d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
@@ -58,8 +58,8 @@ enum P9_SBE_TP_CHIPLET_INIT3_Private_Constants
POLL_COUNT = 300, // Observed Number of times CBS read for CBS_INTERNAL_STATE_VECTOR
OSC_ERROR_MASK = 0xF700000000000000, // Mask OSC errors
LFIR_ACTION0_VALUE = 0x0000000000000000,
- LFIR_ACTION1_VALUE = 0xFFFFBC2BFC7FFFFF,
- FIR_MASK_VALUE = 0x0000000000000000
+ LFIR_ACTION1_VALUE = 0x8000000000000000,
+ FIR_MASK_VALUE = 0xFFFFFFFFFFC00000
};
static fapi2::ReturnCode p9_sbe_tp_chiplet_init3_clock_test2(
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