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author | Joe McGill <jmcgill@us.ibm.com> | 2017-06-08 11:45:40 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-08-07 04:29:06 -0400 |
commit | efe5cb3abc1e91eab68d8c94072a16500a3ce3f5 (patch) | |
tree | b5015efc5f4efa2ebeb81eb616e5b8f9a92f0e53 /src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H | |
parent | 98da28dcc3babbe2591ba1852b48026b3f419d11 (diff) | |
download | talos-sbe-efe5cb3abc1e91eab68d8c94072a16500a3ce3f5.tar.gz talos-sbe-efe5cb3abc1e91eab68d8c94072a16500a3ce3f5.zip |
L3 update -- p9_sbe_load_bootloader
Change-Id: Ia0cb15dc2f6d8dfcfc8e9696a2878fce6a01ccbb
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42673
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42677
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H | 64 |
1 files changed, 25 insertions, 39 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H index fced2b1e..ae24f617 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,71 +22,57 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -//------------------------------------------------------------------------------------ -// + +/// /// @file p9_sbe_load_bootloader.H -/// @brief Shift HB bootloader payload from SEEPROM to L3 cache of master core via PBA -// -// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com -// *HWP HWP Writer: Murey A Luna Torres malunato@us.ibm.com, Joseph McGill jmcgill@us.ibm.com +/// @brief Shift HB bootloader payload from SEEPROM to L3 cache of master core +/// via PBA +/// + +// *HWP HWP Owner: Joseph McGill jmcgill@us.ibm.com // *HWP FW Owner: Thi Tran thi@us.ibm.com // *HWP Team: Nest -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: SBE -//----------------------------------------------------------------------------------- -// *! ADDITIONAL COMMENTS: -// *! -// *! This hardware procedure is used to load a bootloader image from seeprom into -// *! L3 of master core via PBA unit. -// *! -// *! Successful operation assumes that: -// *! PBA communication is available -// *! -// *! High-level procedure flow: -// *! -//------------------------------------------------------------------------------------ #ifndef _SBE_BOOTLOADER_H_ #define _SBE_BOOTLOADER_H_ -//----------------------------------------------------------------------------------- +//------------------------------------------------------------------------------ // Includes -//----------------------------------------------------------------------------------- - +//------------------------------------------------------------------------------ #include <fapi2.H> -#include <p9_sbe_hb_structures.H> -//----------------------------------------------------------------------------------- -// Structure definitions -//----------------------------------------------------------------------------------- -//function pointer typedef definition for HWP call support +//------------------------------------------------------------------------------ +// Structure definitions +//------------------------------------------------------------------------------ +// function pointer typedef definition for HWP call support typedef fapi2::ReturnCode(*p9_sbe_load_bootloader_FP_t) ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&, const fapi2::Target<fapi2::TARGET_TYPE_EX>&, const uint64_t, uint8_t*); -//----------------------------------------------------------------------------------- -// Constant definitions -//----------------------------------------------------------------------------------- +//------------------------------------------------------------------------------ +// Function prototype +//------------------------------------------------------------------------------ +// extern "C" { - //----------------------------------------------------------------------------------- - // Function prototype - //----------------------------------------------------------------------------------- - // -/// @brief Shift HB bootloader payload from SEEPROM to L3 cache of master core via PBA +/// +/// @brief Shift HB bootloader payload from SEEPROM to L3 cache of master core +/// via PBA /// @param[in] i_master_chip_target Reference to master processor chip target -/// @param[in] i_master_ex_target Reference to master ex unit target -/// @param[in] i_payload_size Size of image payload load to load, in B +/// @param[in] i_master_ex_target Reference to master EX unit target +/// @param[in] i_payload_size Size of image payload data, in B /// @param[in] i_payload_data Pointer to image payload data /// /// @return FAPI_RC_SUCCESS if success, else error code /// fapi2::ReturnCode p9_sbe_load_bootloader( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_master_chip_target, - const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_master_eq_target, + const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_master_ex_target, const uint64_t i_payload_size, uint8_t* i_payload_data); |