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authorShakeeb <shakeebbk@in.ibm.com>2016-08-27 10:50:49 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-08-30 06:01:06 -0400
commitf2d94b5f809410300fe10dc9d0786790018463a0 (patch)
tree467f90297b0eb7c5c6672653d778ed4734c0d5a3 /src/boot/loader_l2.c
parent49b557dcae32250e8e06c4de895c0b7ba0e8009e (diff)
downloadtalos-sbe-f2d94b5f809410300fe10dc9d0786790018463a0.tar.gz
talos-sbe-f2d94b5f809410300fe10dc9d0786790018463a0.zip
SBE code restructure: sbe -> src rename
Change-Id: I6e4378d0e71a00ed2b239658d43f180df2a9b748 RTC:159709 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28875 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/boot/loader_l2.c')
-rw-r--r--src/boot/loader_l2.c88
1 files changed, 88 insertions, 0 deletions
diff --git a/src/boot/loader_l2.c b/src/boot/loader_l2.c
new file mode 100644
index 00000000..4f575bea
--- /dev/null
+++ b/src/boot/loader_l2.c
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+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/boot/loader_l2.c $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#include "sbeXipUtils.H"
+
+// Load section to destination address
+int32_t loadSection( P9XipSection * i_section, uint64_t *i_destAddr )
+{
+ uint32_t idx = 0;
+ uint64_t *seepromAddr = (uint64_t *)( g_headerAddr + i_section->iv_offset);
+ uint32_t sectionSize = i_section->iv_size;
+ for( idx = 0; idx < sectionSize; idx += 8 )
+ {
+ *i_destAddr = *seepromAddr;
+ i_destAddr++; seepromAddr++;
+
+ }
+ return 0;
+}
+
+// Function to load base image into PIBMEM
+int32_t base_loader()
+{
+ int32_t rc = 0;
+ P9XipHeader *hdr = getXipHdr();
+
+ uint64_t *pibMemAddr = (uint64_t *)g_pibMemAddr;
+ uint64_t *tempPibMemAddr = (uint64_t *)g_pibMemAddr;
+ uint64_t *pibEndAddr = (uint64_t *)(SBE_LOADER_BASE_ORIGIN);
+
+ // Initialise complete PIBMEM with 0
+ // Though this is inefficient, this is quick fix to solve the
+ // HW write of data which is not 8 byte alligned. All write which
+ // are not 8 byte alligned, translates to read-modify-write. So
+ // if code does a write for 4 byte, first HW will read 8 bytes. If
+ // there is no data written there earlier and random data is present
+ // it can cause ecc errors.
+ // TODO via RTC 158797
+ // Though we may be able to optimise it, but than we have to put the
+ // logic in loadSection function which is not desired. So currently
+ // initialising all PIBMEM. If performance become concern during initial
+ // SBE load, we can optimise this.
+ // We have three options here in optimisation
+ // 1. Put this logic in SEEPROM loader ( pmloader ). This was we can
+ // reclaim space taken by base loader as stack/bss can grow in base
+ // loader section after image load.
+ // 2. Keep this code in PIBMEM. But do not initialise the memory taken
+ // by base image.
+ // 3. Do what is done in option 1 but only initialise memoty after base
+ // section to end of PIBMEM. This will involve some more hardcoding
+ // in seeprom loader.
+ // My preference will be option 1 but depends upon performance goals.
+ for( ; tempPibMemAddr < pibEndAddr; tempPibMemAddr++ )
+ {
+ *tempPibMemAddr = 0;
+ }
+
+ loadSection(&(hdr->iv_section[P9_XIP_SECTION_SBE_BASE]), pibMemAddr);
+ // Set the IVPR register. This is required so that interrupt vector table
+ // points to pk interfaces.
+ uint64_t data = (uint64_t)(SBE_BASE_ORIGIN) << 32;
+ PPE_STVD(g_ivprLoc, data);
+ // Jump to pk boot function
+ uint32_t addr = hdr->iv_kernelAddr;
+ JUMP_TO_ADDR(addr);
+
+ return rc;
+}
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