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author | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-07-28 10:06:05 -0500 |
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committer | AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> | 2016-08-05 07:31:55 -0400 |
commit | faa0f7b45544c74497355df3a4536258538056c7 (patch) | |
tree | 45d54eef32c959da340a3011a6f7c0fe55a41152 /sbe | |
parent | fbfb5461799e6dae824bcbb10776561d48ef2db3 (diff) | |
download | talos-sbe-faa0f7b45544c74497355df3a4536258538056c7.tar.gz talos-sbe-faa0f7b45544c74497355df3a4536258538056c7.zip |
Initialise PIBMEM
Change-Id: I826378d6d22bca69b776024f0f42cf36952c3141
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27568
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Diffstat (limited to 'sbe')
-rw-r--r-- | sbe/image/base_loader.c | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/sbe/image/base_loader.c b/sbe/image/base_loader.c index b5ea0235..bcb76794 100644 --- a/sbe/image/base_loader.c +++ b/sbe/image/base_loader.c @@ -1,3 +1,27 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: sbe/image/base_loader.c $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ #include "sbeXipUtils.H" // Load section to destination address @@ -22,6 +46,36 @@ int32_t base_loader() P9XipHeader *hdr = getXipHdr(); uint64_t *pibMemAddr = (uint64_t *)g_pibMemAddr; + uint64_t *tempPibMemAddr = (uint64_t *)g_pibMemAddr; + uint64_t *pibEndAddr = (uint64_t *)(SBE_LOADER_BASE_ORIGIN); + + // Initialise complete PIBMEM with 0 + // Though this is inefficient, this is quick fix to solve the + // HW write of data which is not 8 byte alligned. All write which + // are not 8 byte alligned, translates to read-modify-write. So + // if code does a write for 4 byte, first HW will read 8 bytes. If + // there is no data written there earlier and random data is present + // it can cause ecc errors. + // TODO via RTC 158797 + // Though we may be able to optimise it, but than we have to put the + // logic in loadSection function which is not desired. So currently + // initialising all PIBMEM. If performance become concern during initial + // SBE load, we can optimise this. + // We have three options here in optimisation + // 1. Put this logic in SEEPROM loader ( pmloader ). This was we can + // reclaim space taken by base loader as stack/bss can grow in base + // loader section after image load. + // 2. Keep this code in PIBMEM. But do not initialise the memory taken + // by base image. + // 3. Do what is done in option 1 but only initialise memoty after base + // section to end of PIBMEM. This will involve some more hardcoding + // in seeprom loader. + // My preference will be option 1 but depends upon performance goals. + for( ; tempPibMemAddr < pibEndAddr; tempPibMemAddr++ ) + { + *tempPibMemAddr = 0; + } + loadSection(&(hdr->iv_section[P9_XIP_SECTION_SBE_BASE]), pibMemAddr); // Set the IVPR register. This is required so that interrupt vector table // points to pk interfaces. |