Update backing build

Change-Id: I9bb5938618594becc5bb623fc85a6f0b10cac609
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22712
Tested-by: Jenkins Server
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

5 files changed, 3 insertions, 114 deletions

diff --git a/sbe/build/citest/etc/patches/p9regs.chip.patch b/sbe/build/citest/etc/patches/p9regs.chip.patch
deleted file mode 100644
index e55ea02d..00000000
--- a/sbe/build/citest/etc/patches/p9regs.chip.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-4339a4340,4429
->   0x100F0164
->   0x110F0164
->   0x120F0164
->   0x130F0164
->   0x140F0164
->   0x150F0164
->   0x200F0164
->   0x210F0164
->   0x220F0164
->   0x230F0164
->   0x240F0164
->   0x250F0164
->   0x260F0164
->   0x270F0164
->   0x280F0164
->   0x290F0164
->   0x2A0F0164
->   0x2B0F0164
->   0x2C0F0164
->   0x2D0F0164
->   0x2E0F0164
->   0x2F0F0164
->   0x300F0164
->   0x310F0164
->   0x320F0164
->   0x330F0164
->   0x340F0164
->   0x350F0164
->   0x360F0164
->   0x370F0164
->   0x100F0154
->   0x110F0154
->   0x120F0154
->   0x130F0154
->   0x140F0154
->   0x150F0154
->   0x200F0154
->   0x210F0154
->   0x220F0154
->   0x230F0154
->   0x240F0154
->   0x250F0154
->   0x260F0154
->   0x270F0154
->   0x280F0154
->   0x290F0154
->   0x2A0F0154
->   0x2B0F0154
->   0x2C0F0154
->   0x2D0F0154
->   0x2E0F0154
->   0x2F0F0154
->   0x300F0154
->   0x310F0154
->   0x320F0154
->   0x330F0154
->   0x340F0154
->   0x350F0154
->   0x360F0154
->   0x370F0154
->   0x100F0167
->   0x110F0167
->   0x120F0167
->   0x130F0167
->   0x140F0167
->   0x150F0167
->   0x200F0167
->   0x210F0167
->   0x220F0167
->   0x230F0167
->   0x240F0167
->   0x250F0167
->   0x260F0167
->   0x270F0167
->   0x280F0167
->   0x290F0167
->   0x2A0F0167
->   0x2B0F0167
->   0x2C0F0167
->   0x2D0F0167
->   0x2E0F0167
->   0x2F0F0167
->   0x300F0167
->   0x310F0167
->   0x320F0167
->   0x330F0167
->   0x340F0167
->   0x350F0167
->   0x360F0167
->   0x370F0167
diff --git a/sbe/build/citest/etc/patches/patchlist.txt b/sbe/build/citest/etc/patches/patchlist.txt
index afea6d3e..6e932f48 100644
--- a/sbe/build/citest/etc/patches/patchlist.txt
+++ b/sbe/build/citest/etc/patches/patchlist.txt
@@ -8,7 +8,3 @@
 RTC: 144728
 Files : pervasive.act.patch. Currently SUET does not support FSIMBOX KW. Once
         support is in, remove this patch.
-
-RTC: 148318
-Files : p9regs.chip.patch. Some scom definitions are missing in the CMVC backing
-        builds. This patch can be removde once we have those in a CMVC driver.
diff --git a/sbe/build/citest/etc/workarounds.postsimsetup b/sbe/build/citest/etc/workarounds.postsimsetup
index af3f198a..488db0b9 100755
--- a/sbe/build/citest/etc/workarounds.postsimsetup
+++ b/sbe/build/citest/etc/workarounds.postsimsetup
@@ -7,10 +7,7 @@
 #echo "+++ Updating something wonderful in a simics file"
 #mkdir -p $sb/simu/data/cec-chip/
 #cp $BACKING_BUILD/src/simu/data/cec-chip/base_cec_chip_file $sb/simu/data/cec-chip
-#patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $HOSTBOOTROOT/src/build/citest/etc/patches/my_patch_File
+#patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $SBEROOT/src/build/citest/etc/patches/my_patch_File
 
 echo "+++ Add FSIMBOX KW for actions on 50018 register"
 patch -p0 $sb/simu/data/cec-chip/pervasive.act $SBEROOT/sbe/build/citest/etc/patches/pervasive.act.patch
-echo "+++ Patching scomdef file"
-cp $BACKING_BUILD/src/simu/data/cec-chip/p9regs.chip $SANDBOXBASE/src/simu/data/cec-chip
-patch -p0 $sb/simu/data/cec-chip/p9regs.chip $SBEROOT/sbe/build/citest/etc/patches/p9regs.chip.patch
diff --git a/sbe/build/citest/setup-env b/sbe/build/citest/setup-env
index 124d3a8e..9fa02c93 100755
--- a/sbe/build/citest/setup-env
+++ b/sbe/build/citest/setup-env
@@ -20,7 +20,7 @@ then
     export SANDBOXROOT=${SBEROOT}
 fi
 
-if [ -z $SANDBOXNAME ] || [ $RUNNING_UNDER_JENKINS -eq 1 ];
+if [ -z $SANDBOXNAME ] || [ "$RUNNING_UNDER_JENKINS" = "1" ];
 then
     export SANDBOXNAME=${SBECI_SANDBOX}
 fi
diff --git a/sbe/test/test.xml b/sbe/test/test.xml
index ce3ee1e1..9cbebade 100755
--- a/sbe/test/test.xml
+++ b/sbe/test/test.xml
@@ -7,22 +7,9 @@
         <test>
            <!-- Set IVPR to point to sbe start address ( currently PIBMEM) -->
           <testcase>
-              <simcmd>p9Proc0.sbe.mibo_space.write 0xc0000160 0x8000100000000000 8 -b</simcmd>
+              <simcmd>p9Proc0.proc_chip.invoke parallel_store FSIMBOX 0x01 \"80000000\" 32</simcmd>
               <exitonerror>yes</exitonerror>
           </testcase>
-          <testcase>
-              <simcmd>p9Proc0.sbe.mibo_space.write 0xc00e0000 0x5000000000000000 8 -b</simcmd>
-              <exitonerror>yes</exitonerror>
-          </testcase>
-          <testcase>
-              <simcmd>sim->frontend_current_processor = p9Proc0.sbe.ppe</simcmd>
-              <exitonerror>yes</exitonerror>
-          </testcase>
-          <!-- Workaround to set clock regs. Once simics have fix, we can remove it -->
-          <testcase>
-            <simcmd>p9Proc0.proc_chip.invoke parallel_store LOGIC 0xffc50000 \"00000000_00000001\" 64</simcmd>
-          </testcase>
-      <!-- Write value to a register and than read it back -->
            <!-- Register SBE tools -->
           <testcase>
               <simcmd>run-python-file targets/p9_nimbus/sbeTest/simics-debug-framework.py</simcmd>