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authorRaja Das <rajadas2@in.ibm.com>2016-06-01 13:37:29 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-08-01 23:24:01 -0400
commita7dc5dec6488bc1eb77eb41e45b796d78de4d3c7 (patch)
tree23627925bb5c4fbffa9c030632535318fc80c92c /sbe
parent0c9efe49586228ea608086b7768fc144ba0be2ab (diff)
downloadtalos-sbe-a7dc5dec6488bc1eb77eb41e45b796d78de4d3c7.tar.gz
talos-sbe-a7dc5dec6488bc1eb77eb41e45b796d78de4d3c7.zip
SBE State Machine Implementation
Change-Id: I480937871cc14025d46d562fa68700deb350b9ee RTC: 126146 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25262 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'sbe')
-rw-r--r--sbe/sbefw/sbe_sp_intf.H7
-rw-r--r--sbe/sbefw/sbecmdcntrldmt.C11
-rw-r--r--sbe/sbefw/sbecmdiplcontrol.C150
-rw-r--r--sbe/sbefw/sbecmdiplcontrol.H74
-rw-r--r--sbe/sbefw/sbecmdparser.C194
-rw-r--r--sbe/sbefw/sbecmdparser.H47
-rw-r--r--sbe/sbefw/sbecmdprocessor.C27
-rw-r--r--sbe/sbefw/sbecmdreceiver.C63
-rw-r--r--sbe/sbefw/sbecmdscomaccess.C34
-rw-r--r--sbe/sbefw/sbecmdscomaccess.H32
-rw-r--r--sbe/sbefw/sbeevents.H97
-rw-r--r--sbe/sbefw/sbemain.C12
-rw-r--r--sbe/sbefw/sberegaccess.C113
-rw-r--r--sbe/sbefw/sberegaccess.H43
-rw-r--r--sbe/sbefw/sbestates.H50
-rw-r--r--sbe/sbefw/sbeutil.H4
-rwxr-xr-xsbe/test/testAbort.py58
-rwxr-xr-xsbe/test/testContinueMpipl.py58
-rwxr-xr-xsbe/test/testContinueSbeBoot.py58
-rwxr-xr-xsbe/test/testEnterMpipl.py58
-rw-r--r--sbe/test/testFifoReset.xml26
-rw-r--r--sbe/test/testIstep.xml31
-rwxr-xr-xsbe/test/testIstepInvalid.py26
-rwxr-xr-xsbe/test/testIstepInvalidFenced.py58
24 files changed, 1237 insertions, 94 deletions
diff --git a/sbe/sbefw/sbe_sp_intf.H b/sbe/sbefw/sbe_sp_intf.H
index 1f02515f..bb92e05d 100644
--- a/sbe/sbefw/sbe_sp_intf.H
+++ b/sbe/sbefw/sbe_sp_intf.H
@@ -70,7 +70,7 @@ enum sbeCommandClass
enum sbeIplControlCommands
{
SBE_CMD_EXECUTE_ISTEP = 0x01, /* Execute istep */
- SBE_CMD_IS_SBE_IPL_DONE = 0x02, /* Check if SBE IPL Done */
+ SBE_CMD_CONTINUE_BOOT = 0x02, /* Continue SBE Boot */
};
/**
@@ -158,12 +158,13 @@ enum sbeGenericMessageCommands
SBE_CMD_GET_SBE_FFDC = 0x01, /* Get FFDC */
SBE_CMD_GET_SBE_CAPABILITIES = 0x02, /* GET SBE capabilities */
SBE_CMD_GET_FREQ_SUPPORTED = 0x03, /* Get Supported frequencies */
- SBE_CMD_GET_SBE_STATE = 0x04, /* Get SBE State */
+ SBE_CMD_ABORT = 0x05, /* Sbe Abort */
};
enum sbeMpIplCommands
{
- SBE_CMD_MPIPL_INVALID = 0x00,
+ SBE_CMD_MPIPL_ENTER = 0x01, /* Enter MPIPL */
+ SBE_CMD_MPIPL_CONTINUE = 0x02, /* Continue MPIPL */
};
/**
diff --git a/sbe/sbefw/sbecmdcntrldmt.C b/sbe/sbefw/sbecmdcntrldmt.C
index 85ab2453..ff14c11a 100644
--- a/sbe/sbefw/sbecmdcntrldmt.C
+++ b/sbe/sbefw/sbecmdcntrldmt.C
@@ -34,6 +34,8 @@
#include "sbe_build_info.H"
#include "sbeHostMsg.H"
#include "sbeHostUtils.H"
+#include "sberegaccess.H"
+#include "sbestates.H"
#include "sbe_sp_intf.H"
#include "fapi2.H"
#include "p9_sbe_check_master_stop15.H"
@@ -60,6 +62,9 @@ void sbeDmtPkExpiryCallback(void *)
SBE_INFO(SBE_FUNC" DMT Callback Timer has expired..Checkstop the system ");
g_SbeDmtTimerExpired = true;
+ (void)SbeRegAccess::theSbeRegAccess().stateTransition(
+ SBE_DUMP_FAILURE_EVENT);
+
// check stop the system
uint32_t l_status = SBE_PCB_PIB_ERROR_NONE;
l_status = putscom_abs (PERV_N3_LOCAL_FIR_OR, N3_FIR_CORE_CHECKSTOP_BIT);
@@ -128,6 +133,9 @@ uint32_t sbeStartCntlDmt()
"SBE_HOST_PSU_MBOX_REG4");
break;
}
+ // Set DMT State
+ (void)SbeRegAccess::theSbeRegAccess().stateTransition(
+ SBE_DMT_ENTER_EVENT);
// Fetch the master core
Target<TARGET_TYPE_PROC_CHIP > l_procTgt = plat_getChipTarget();
@@ -234,6 +242,9 @@ uint32_t sbeStopCntlDmt()
SBE_ERROR(SBE_FUNC" Failed to write to SBE_HOST_PSU_MBOX_REG4");
break;
}
+ // Set Runtime State
+ (void)SbeRegAccess::theSbeRegAccess().stateTransition(
+ SBE_DMT_COMP_EVENT);
}while(0);
return l_rc;
diff --git a/sbe/sbefw/sbecmdiplcontrol.C b/sbe/sbefw/sbecmdiplcontrol.C
index 3468accb..49ced429 100644
--- a/sbe/sbefw/sbecmdiplcontrol.C
+++ b/sbe/sbefw/sbecmdiplcontrol.C
@@ -242,7 +242,7 @@ static istepMap_t g_istep4PtrTbl[ ISTEP4_MAX_SUBSTEPS ] =
{ &istepNoOp, NULL }, // DFT Only
{ &istepNoOp, NULL }, // DFT Only
{ &istepWithCore, { .coreHwp = &p9_hcd_core_initf }},
- { &istepWithCoreConditional,
+ { &istepWithCoreConditional,
{ .coreHwp = &p9_hcd_core_startclocks }},
{ &istepWithCoreConditional, { .coreHwp = &p9_hcd_core_scominit }},
{ &istepWithCoreConditional, { .coreHwp = &p9_hcd_core_scomcust }},
@@ -299,6 +299,7 @@ uint32_t sbeHandleIstep (uint8_t *i_pArg)
SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
break;
}
+
fapiRc = sbeExecuteIstep( req.major, req.minor );
if( fapiRc != FAPI2_RC_SUCCESS )
{
@@ -309,6 +310,7 @@ uint32_t sbeHandleIstep (uint8_t *i_pArg)
ffdc.setRc(fapiRc);
break;
}
+
}while(0);
//loop 2
@@ -403,11 +405,15 @@ ReturnCode sbeExecuteIstep (const uint8_t i_major, const uint8_t i_minor)
(void)SbeRegAccess::theSbeRegAccess().updateSbeStep(i_major, i_minor);
- // TODO: via RTC: 126146 - Should the state be set to DUMP even in istep
- // mode failures? Revisit this when we implement state management.
if(rc != FAPI2_RC_SUCCESS)
{
- (void)SbeRegAccess::theSbeRegAccess().updateSbeState(SBE_STATE_DUMP);
+ // If IPLing State
+ uint64_t l_state = SbeRegAccess::theSbeRegAccess().getSbeState();
+ if(l_state == SBE_STATE_IPLING)
+ {
+ (void)SbeRegAccess::theSbeRegAccess().
+ stateTransition(SBE_DUMP_FAILURE_EVENT);
+ }
}
return rc;
@@ -630,7 +636,8 @@ ReturnCode istepStartInstruction( sbeIstepHwp_t i_hwp)
rc = istepWithCore(i_hwp);
if(rc == FAPI2_RC_SUCCESS)
{
- (void)SbeRegAccess::theSbeRegAccess().updateSbeState(SBE_STATE_RUNTIME);
+ (void)SbeRegAccess::theSbeRegAccess().stateTransition(
+ SBE_RUNTIME_EVENT);
}
return rc;
}
@@ -643,7 +650,8 @@ ReturnCode istepCheckSbeMaster( sbeIstepHwp_t i_hwp)
SBE_ROLE_SLAVE : SBE_ROLE_MASTER;
if(SBE_ROLE_SLAVE == g_sbeRole)
{
- (void)SbeRegAccess::theSbeRegAccess().updateSbeState(SBE_STATE_RUNTIME);
+ (void)SbeRegAccess::theSbeRegAccess().stateTransition(
+ SBE_RUNTIME_EVENT);
}
return rc;
}
@@ -655,13 +663,66 @@ ReturnCode istepNoOp( sbeIstepHwp_t i_hwp)
return FAPI2_RC_SUCCESS ;
}
+// Only allowed in PLCK Mode, since FFDC State mode is set only in PLCK
//----------------------------------------------------------------------------
-
-uint32_t sbeWaitForSbeIplDone (uint8_t *i_pArg)
+uint32_t sbeContinueBoot (uint8_t *i_pArg)
{
+ #define SBE_FUNC "sbeContinueBoot "
uint32_t rc = SBE_SEC_OPERATION_SUCCESSFUL;
- SBE_TRACE("sbeWaitForSbeIplDone");
+ uint32_t len = 0;
+ sbeRespGenHdr_t respHdr;
+ respHdr.init();
+
+ do
+ {
+ // Dequeue the EOT entry as no more data is expected.
+ rc = sbeUpFifoDeq_mult (len, NULL);
+ if(rc != SBE_SEC_OPERATION_SUCCESSFUL)
+ {
+ // let command processor routine handle the RC
+ break;
+ }
+
+ uint32_t distance = 1;
+ len = sizeof(respHdr)/sizeof(uint32_t);
+ rc = sbeDownFifoEnq_mult ( len, ( uint32_t *) &respHdr);
+ if (rc)
+ {
+ break;
+ }
+ distance += len;
+
+ len = sizeof(distance)/sizeof(uint32_t);
+ rc = sbeDownFifoEnq_mult ( len, &distance);
+ if (rc)
+ {
+ break;
+ }
+ rc = sbeDownFifoSignalEot();
+ if (rc)
+ {
+ break;
+ }
+
+ // Expecting this to be in PLCK Mode and not in Istep mode
+ if(SbeRegAccess::theSbeRegAccess().isDestBitRuntime())
+ {
+ (void)SbeRegAccess::theSbeRegAccess().stateTransition(
+ SBE_CONTINUE_BOOT_RUNTIME_EVENT);
+ // Nothing to do here.
+ }
+ else
+ {
+ SBE_DEBUG(SBE_FUNC"Continuous IPL Mode set... IPLing");
+ (void)SbeRegAccess::theSbeRegAccess().stateTransition(
+ SBE_CONTINUE_BOOT_PLCK_EVENT);
+ sbeDoContinuousIpl();
+ }
+ }while(0);
+
+ SBE_DEBUG(SBE_FUNC "RC = 0x%08X", rc);
return rc;
+ #undef SBE_FUNC
}
//----------------------------------------------------------------------------
@@ -691,7 +752,8 @@ void sbeDoContinuousIpl()
};
// Set SBE state as IPLing
- (void)SbeRegAccess::theSbeRegAccess().updateSbeState(SBE_STATE_IPLING);
+ (void)SbeRegAccess::theSbeRegAccess().stateTransition(
+ SBE_PLCK_EVENT);
bool l_done = false;
// Run isteps
for(uint8_t l_major = SBE_ISTEP_FIRST;
@@ -727,3 +789,71 @@ void sbeDoContinuousIpl()
#undef SBE_FUNC
}
+// TODO - RTC 133367
+//----------------------------------------------------------------------------
+uint32_t sbeEnterMpipl(uint8_t *i_pArg)
+{
+ #define SBE_FUNC " sbeEnterMpipl "
+ uint32_t l_rc = SBE_SEC_OPERATION_SUCCESSFUL;
+ uint32_t len = 0;
+ sbeRespGenHdr_t l_respHdr;
+ l_respHdr.init();
+
+ do
+ {
+ // Dequeue the EOT entry as no more data is expected.
+ l_rc = sbeUpFifoDeq_mult (len, NULL);
+ if ( l_rc != SBE_SEC_OPERATION_SUCCESSFUL )
+ {
+ // Let command processor routine to handle the RC
+ break;
+ }
+
+ sbeResponseFfdc_t l_ffdc;
+ l_rc = sbeDsSendRespHdr( l_respHdr, l_ffdc);
+
+ // set state to MPIPL Wait
+ (void)SbeRegAccess::theSbeRegAccess().
+ stateTransition(SBE_ENTER_MPIPL_EVENT);
+
+ //TODO RTC-123696 MPIPL Related procedure/steps
+ }while(0);
+ return l_rc;
+ #undef SBE_FUNC
+}
+
+// TODO - RTC 133367
+//----------------------------------------------------------------------------
+uint32_t sbeContinueMpipl(uint8_t *i_pArg)
+{
+ #define SBE_FUNC " sbeContinueMpipl "
+ uint32_t l_rc = SBE_SEC_OPERATION_SUCCESSFUL;
+ uint32_t len = 0;
+ sbeRespGenHdr_t l_respHdr;
+ l_respHdr.init();
+
+ do
+ {
+ // Dequeue the EOT entry as no more data is expected.
+ l_rc = sbeUpFifoDeq_mult (len, NULL);
+ if ( l_rc != SBE_SEC_OPERATION_SUCCESSFUL )
+ {
+ // Let command processor routine to handle the RC
+ break;
+ }
+
+ sbeResponseFfdc_t l_ffdc;
+ l_rc = sbeDsSendRespHdr( l_respHdr, l_ffdc);
+
+ //TODO RTC-134278 Continue MPIPL Related procedure/steps
+
+ // TODO - Once continue steps are over, it will trigger the
+ // istep5.2 and transition to runtime will happen
+
+ }while(0);
+
+ return l_rc;
+ #undef SBE_FUNC
+}
+
+
diff --git a/sbe/sbefw/sbecmdiplcontrol.H b/sbe/sbefw/sbecmdiplcontrol.H
index c3bf0b2d..874d9875 100644
--- a/sbe/sbefw/sbecmdiplcontrol.H
+++ b/sbe/sbefw/sbecmdiplcontrol.H
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: sbe/sbefw/sbecmdiplcontrol.H $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
/*
* @file: ppe/sbe/sbefw/sbecmdiplcontrol.H
*
@@ -26,13 +50,13 @@ uint32_t sbeHandleIstep(uint8_t *i_pArg);
/**
- * @brief Handles wait for IPL done chipop (0xA102)
+ * @brief Handles Sbe continue boot after collect ffdc chip-op (0xA102)
*
* @param[in] i_pArg Buffer to be passed to the function (not used as of now)
*
* @return Rc from the FIFO access utility
*/
-uint32_t sbeWaitForSbeIplDone (uint8_t *i_pArg);
+uint32_t sbeContinueBoot(uint8_t *i_pArg);
/**
@@ -45,4 +69,50 @@ uint32_t sbeWaitForSbeIplDone (uint8_t *i_pArg);
*/
void sbeDoContinuousIpl();
+/**
+ * @brief Handles Sbe Enter Mpipl chip-op (0xA901)
+ *
+ * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
+ *
+ * @return Rc from the FIFO access utility
+ */
+uint32_t sbeEnterMpipl(uint8_t *i_pArg);
+
+/**
+ * @brief Handles Sbe Continue Mpipl chip-op (0xA902)
+ *
+ * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
+ *
+ * @return Rc from the FIFO access utility
+ */
+uint32_t sbeContinueMpipl(uint8_t *i_pArg);
+
+/**
+ * @brief Handles Sbe Get FFDC chip-op (0xA801)
+ *
+ * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
+ *
+ * @return Rc from the FIFO access utility
+ */
+uint32_t sbeGetSbeFfdc(uint8_t *i_pArg);
+
+/**
+ * @brief Handles Sbe Get FFDC chip-op (0xA803)
+ *
+ * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
+ *
+ * @return Rc from the FIFO access utility
+ */
+uint32_t sbeGetFreqSupported(uint8_t *i_pArg);
+
+/**
+ * @brief Handles Sbe Abort chip-op (0xA804)
+ *
+ * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
+ *
+ * @return Rc from the FIFO access utility
+ */
+uint32_t sbeAbort(uint8_t *i_pArg);
+
+
#endif // __SBEFW_SBECMDIPLCONTROL_H
diff --git a/sbe/sbefw/sbecmdparser.C b/sbe/sbefw/sbecmdparser.C
index e7c7c5f6..bbeac428 100644
--- a/sbe/sbefw/sbecmdparser.C
+++ b/sbe/sbefw/sbecmdparser.C
@@ -44,6 +44,16 @@
#include "sbe_sp_intf.H"
#include "sbeHostMsg.H"
#include "sbe_host_intf.H"
+#include "sbestates.H"
+#include "sberegaccess.H"
+
+// Declaration
+static const uint16_t HARDWARE_FENCED_STATE =
+ SBE_FENCE_AT_CONTINUOUS_IPL|SBE_FENCE_AT_QUIESCE|
+ SBE_FENCE_AT_DMT;
+
+static const uint16_t PUT_HARDWARE_FENCED_STATE =
+ HARDWARE_FENCED_STATE|SBE_FENCE_AT_MPIPL;
////////////////////////////////////////////////////////////////
// @brief g_sbeScomCmdArray
@@ -52,25 +62,24 @@ static sbeCmdStruct_t g_sbeScomCmdArray [] =
{
{sbeGetScom,
SBE_CMD_GETSCOM,
- SBE_FENCE_AT_CONTINUOUS_IPL,
- },
-
+ HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
+ },
{sbePutScom,
SBE_CMD_PUTSCOM,
- SBE_FENCE_AT_CONTINUOUS_IPL,
- },
-
-
+ PUT_HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
+ },
{sbeModifyScom,
SBE_CMD_MODIFYSCOM,
- SBE_FENCE_AT_CONTINUOUS_IPL,
- },
-
+ PUT_HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
+ },
{sbePutScomUnderMask,
SBE_CMD_PUTSCOM_MASK,
- SBE_FENCE_AT_CONTINUOUS_IPL,
- },
-
+ PUT_HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
+ },
+ {sbeMultiScom,
+ SBE_CMD_MULTISCOM,
+ PUT_HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
+ },
};
////////////////////////////////////////////////////////////////
@@ -81,13 +90,18 @@ static sbeCmdStruct_t g_sbeIplControlCmdArray [] =
{
{sbeHandleIstep,
SBE_CMD_EXECUTE_ISTEP,
- SBE_FENCE_AT_CONTINUOUS_IPL|SBE_FENCE_AT_RUNTIME|SBE_FENCE_AT_MPIPL,
- },
+ PUT_HARDWARE_FENCED_STATE|SBE_FENCE_AT_RUNTIME|
+ SBE_FENCE_AT_DUMPING,
+ // This is allowed in FFDC Collect state
+ // TODO - Issue 157287 - Allow MPIIPL in Isteps state
+ },
- {sbeWaitForSbeIplDone,
- SBE_CMD_IS_SBE_IPL_DONE,
- SBE_FENCE_AT_ISTEP|SBE_FENCE_AT_RUNTIME|SBE_FENCE_AT_MPIPL,
- },
+ {sbeContinueBoot,
+ SBE_CMD_CONTINUE_BOOT,
+ PUT_HARDWARE_FENCED_STATE|SBE_FENCE_AT_RUNTIME|
+ SBE_FENCE_AT_DUMPING|SBE_FENCE_AT_ISTEP,
+ // This is allowed only in FFDC Collect State in PLCK mode
+ },
};
////////////////////////////////////////////////////////////////
@@ -98,9 +112,9 @@ static sbeCmdStruct_t g_sbeGenericCmdArray [] =
{
{sbeGetCapabilities,
SBE_CMD_GET_SBE_CAPABILITIES,
- SBE_NO_FENCE,
- },
-
+ SBE_STATE_FFDC_COLLECT,
+ // Fence in FFDC Collect State, since it might over-write traces
+ },
};
//////////////////////////////////////////////////////////////
@@ -111,22 +125,22 @@ static sbeCmdStruct_t g_sbeMemoryAccessCmdArray [] =
{
{sbeGetMem,
SBE_CMD_GETMEM,
- SBE_FENCE_AT_CONTINUOUS_IPL,
+ HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
},
{sbePutMem,
SBE_CMD_PUTMEM,
- SBE_FENCE_AT_CONTINUOUS_IPL,
+ PUT_HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
},
{sbeGetOccSram,
SBE_CMD_GETSRAM_OCC,
- SBE_FENCE_AT_CONTINUOUS_IPL,
+ HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
},
{sbePutOccSram,
SBE_CMD_PUTSRAM_OCC,
- SBE_FENCE_AT_CONTINUOUS_IPL,
+ PUT_HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
},
};
@@ -138,9 +152,10 @@ static sbeCmdStruct_t g_sbeInstructionCntlCmdArray[] =
{
{sbeCntlInst,
SBE_CMD_CONTROL_INSTRUCTIONS,
- SBE_FENCE_AT_CONTINUOUS_IPL,
+ PUT_HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
},
};
+
//////////////////////////////////////////////////////////////
// @brief g_sbeRegAccessCmdArray
//
@@ -149,12 +164,36 @@ static sbeCmdStruct_t g_sbeRegAccessCmdArray [] =
{
{sbeGetReg,
SBE_CMD_GETREG,
- SBE_FENCE_AT_CONTINUOUS_IPL,
+ PUT_HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
},
{sbePutReg,
SBE_CMD_PUTREG,
- SBE_FENCE_AT_CONTINUOUS_IPL,
+ PUT_HARDWARE_FENCED_STATE|SBE_STATE_FFDC_COLLECT,
+ },
+};
+
+//////////////////////////////////////////////////////////////
+// @brief g_sbeMpiplCmdArray
+//
+//////////////////////////////////////////////////////////////
+static sbeCmdStruct_t g_sbeMpiplCmdArray[] =
+{
+ {sbeEnterMpipl,
+ SBE_CMD_MPIPL_ENTER,
+ PUT_HARDWARE_FENCED_STATE|SBE_FENCE_AT_ISTEP|
+ SBE_FENCE_AT_DUMPING|SBE_FENCE_AT_ABORT,
+ // Allow Fspless system to enter MPIPL
+ // Honour MPIPL at FFDC Collect state
+ // Issue 157287
+ },
+
+ {sbeContinueMpipl,
+ SBE_CMD_MPIPL_CONTINUE,
+ HARDWARE_FENCED_STATE|SBE_FENCE_AT_ISTEP|
+ SBE_FENCE_AT_RUNTIME|SBE_FENCE_AT_DUMPING|
+ SBE_FENCE_AT_ABORT|SBE_FENCE_AT_FFDC_COLLECT,
+ // Only allowed State is MPIPL
},
};
@@ -178,7 +217,9 @@ static sbeCmdStruct_t g_sbeCoreStateControlCmdArray [] =
{
{sbeControlDeadmanTimer,
SBE_PSU_CMD_CONTROL_DEADMAN,
- SBE_FENCE_AT_CONTINUOUS_IPL,
+ PUT_HARDWARE_FENCED_STATE|SBE_FENCE_AT_ISTEP|
+ SBE_FENCE_AT_DUMPING|SBE_FENCE_AT_ABORT|
+ SBE_FENCE_AT_FFDC_COLLECT,
},
};
@@ -250,6 +291,12 @@ uint8_t sbeGetCmdStructAttr (const uint8_t i_cmdClass,
*o_ppCmd = (sbeCmdStruct_t*)g_sbeRingAccessCmdArray;
break;
+ case SBE_CMD_CLASS_MPIPL_COMMANDS:
+ l_numCmds = sizeof(g_sbeMpiplCmdArray) /
+ sizeof(sbeCmdStruct_t);
+ *o_ppCmd = (sbeCmdStruct_t*)g_sbeMpiplCmdArray;
+ break;
+
// PSU Commands
case SBE_PSU_CMD_CLASS_CORE_STATE:
l_numCmds = sizeof(g_sbeCoreStateControlCmdArray) /
@@ -322,9 +369,90 @@ uint8_t sbeValidateCmdClass (const uint8_t i_cmdClass,
bool sbeIsCmdAllowedAtState (const uint8_t i_cmdClass,
const uint8_t i_cmdOpcode)
{
- // @TODO via RTC : 126146
- // SBE state management
- return 0;
+ #define SBE_FUNC " sbeIsCmdAllowedAtState "
+ uint8_t l_numCmds = 0;
+ sbeCmdStruct_t *l_pCmd = NULL;
+ bool l_ret = false;
+ l_numCmds = sbeGetCmdStructAttr (i_cmdClass, &l_pCmd);
+
+ SBE_DEBUG(SBE_FUNC"CmdClass[0x%02X], CmdOpcode[0x%02X], NumCmds[0x%02X]",
+ i_cmdClass, i_cmdOpcode, l_numCmds);
+
+ for (uint8_t l_cnt = 0; l_cnt < l_numCmds; ++l_cnt, ++l_pCmd)
+ {
+ if (i_cmdOpcode == l_pCmd->cmd_opcode)
+ {
+ // Get the Present State
+ uint64_t l_state =
+ SbeRegAccess::theSbeRegAccess().getSbeState();
+ SBE_DEBUG(SBE_FUNC "SBE State [0x%08X] Fence State[0x%04X]",
+ (uint32_t)(l_state & 0xFFFFFFFF),l_pCmd->cmd_state_fence);
+
+ switch(l_state)
+ {
+ case SBE_STATE_QUIESCE:
+ case SBE_STATE_UNKNOWN:
+ case SBE_STATE_FAILURE:
+ // All operations are fenced here, return false
+ // Reset is the only Option available
+ break;
+
+ case SBE_STATE_FFDC_COLLECT:
+ {
+ l_ret = ((l_pCmd->cmd_state_fence &
+ SBE_FENCE_AT_FFDC_COLLECT)? false:true);
+ break;
+ }
+
+ case SBE_STATE_IPLING:
+ {
+ l_ret = ((l_pCmd->cmd_state_fence &
+ SBE_FENCE_AT_CONTINUOUS_IPL)? false:true);
+ break;
+ }
+
+ case SBE_STATE_ISTEP:
+ {
+ l_ret = ((l_pCmd->cmd_state_fence &
+ SBE_FENCE_AT_ISTEP)? false:true);
+ break;
+ }
+
+ case SBE_STATE_RUNTIME:
+ {
+ l_ret = ((l_pCmd->cmd_state_fence &
+ SBE_FENCE_AT_RUNTIME)? false:true);
+ break;
+ }
+
+ case SBE_STATE_DUMP:
+ {
+ l_ret = ((l_pCmd->cmd_state_fence &
+ SBE_FENCE_AT_DUMPING)? false:true);
+ break;
+ }
+
+ case SBE_STATE_MPIPL:
+ {
+ l_ret = ((l_pCmd->cmd_state_fence &
+ SBE_FENCE_AT_MPIPL)? false:true);
+ break;
+ }
+
+ case SBE_STATE_ABORT:
+ {
+ l_ret = ((l_pCmd->cmd_state_fence &
+ SBE_FENCE_AT_ABORT)? false:true);
+ break;
+ }
+
+ default: break;
+ }
+ }
+ }
+ // For any other state, which is not handled above, return from here
+ return l_ret;
+ #undef SBE_FUNC
}
////////////////////////////////////////////////////////////////
diff --git a/sbe/sbefw/sbecmdparser.H b/sbe/sbefw/sbecmdparser.H
index b6b69481..cbe63295 100644
--- a/sbe/sbefw/sbecmdparser.H
+++ b/sbe/sbefw/sbecmdparser.H
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: sbe/sbefw/sbecmdparser.H $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
/*
* @file: ppe/sbe/sbefw/sbecmdparser.H
*
@@ -19,26 +43,29 @@
typedef uint32_t (*sbeChipOpFunc_t) (uint8_t *i_pArg);
typedef struct {
- sbeChipOpFunc_t cmd_func; /* Command function pointer */
- uint8_t cmd_opcode; /* Command opcode */
- uint8_t cmd_state_fence; /* Command fencing based on SBE state */
+ sbeChipOpFunc_t cmd_func; /* Command function pointer */
+ uint8_t cmd_opcode; /* Command opcode */
+ uint16_t cmd_state_fence; /* Command fencing based on SBE state */
} sbeCmdStruct_t;
-
/**
* @brief SBE Command Fence attributes
*
*/
enum sbe_command_fence_attrs
{
- SBE_FENCE_AT_ISTEP = 0x80, ///< Fence off the cmd at istep state
- SBE_FENCE_AT_CONTINUOUS_IPL = 0x40, ///< Fence off the cmd at cont IPL
- SBE_FENCE_AT_RUNTIME = 0x20, ///< Fence off the cmd at Runtime state
- SBE_FENCE_AT_MPIPL = 0x10, ///< Fence off the cmd at MPIPL state
- SBE_NO_FENCE = 0x00, ///< Allow cmd in all states
+ SBE_NO_FENCE = 0x0000, ///< Allow cmd in all states
+ SBE_FENCE_AT_ABORT = 0x0001, ///< Fence off at SBE Abort State
+ SBE_FENCE_AT_FFDC_COLLECT = 0x0002, ///< Fence off at FFDC Collect State
+ SBE_FENCE_AT_DUMPING = 0x0004, ///< Fence off at DUMPING State
+ SBE_FENCE_AT_MPIPL = 0x0010, ///< Fence off at MPIPL state
+ SBE_FENCE_AT_CONTINUOUS_IPL = 0x0040, ///< Fence off at cont IPL
+ SBE_FENCE_AT_ISTEP = 0x0080, ///< Fence off at istep state
+ SBE_FENCE_AT_RUNTIME = 0x0100, ///< Fence off at Runtime state
+ SBE_FENCE_AT_QUIESCE = 0x0200, ///< Fense off at Quiesce state
+ SBE_FENCE_AT_DMT = 0x0400, ///< Fense off at DMT state
};
-
/**
* @brief sbeValidateCmdClass Validates the command class and opcode
*
diff --git a/sbe/sbefw/sbecmdprocessor.C b/sbe/sbefw/sbecmdprocessor.C
index 7c525f56..0f3f90b4 100644
--- a/sbe/sbefw/sbecmdprocessor.C
+++ b/sbe/sbefw/sbecmdprocessor.C
@@ -61,6 +61,7 @@ void sbeHandlePsuResponse (const uint32_t i_rc)
{
case SBE_SEC_COMMAND_CLASS_NOT_SUPPORTED:
case SBE_SEC_COMMAND_NOT_SUPPORTED:
+ case SBE_SEC_COMMAND_NOT_ALLOWED_IN_THIS_STATE:
// Caller sent an invalid Command class/opcode
// Set the Ack bit in SBE->PSU DB register
l_rc = sbeAcknowledgeHost();
@@ -143,6 +144,7 @@ void sbeHandleFifoResponse (const uint32_t i_rc)
{
case SBE_SEC_COMMAND_CLASS_NOT_SUPPORTED:
case SBE_SEC_COMMAND_NOT_SUPPORTED:
+ case SBE_SEC_COMMAND_NOT_ALLOWED_IN_THIS_STATE:
// Caller sent Invalid Command
case SBE_SEC_OS_FAILURE:
@@ -222,21 +224,36 @@ void sbeSyncCommandProcessor_routine(void *i_pArg)
SBE_ENTER(SBE_FUNC);
// Check the destination bit at the start
- if(SbeRegAccess::theSbeRegAccess().isDestBitRuntime())
+ if(SbeRegAccess::theSbeRegAccess().isIstepMode())
+ {
+ // In this state, we need not take care of FFDC State, User may
+ // or may not fetch FFDC and may not issue sbeContinueboot
+ SBE_DEBUG(SBE_FUNC"Continuous IPL mode not set, will wait for "
+ "commands...");
+ (void)SbeRegAccess::theSbeRegAccess().
+ updateSbeState(SBE_STATE_ISTEP);
+ }
+ // If Istep mode is not set, it makes sense to check if we are directly
+ // in runtime.
+ else if(true == SbeRegAccess::theSbeRegAccess().isDestBitRuntime())
{
SBE_DEBUG(SBE_FUNC"Destination bit tells us to go to runtime");
(void)SbeRegAccess::theSbeRegAccess().
updateSbeState(SBE_STATE_RUNTIME);
}
- else if(SbeRegAccess::theSbeRegAccess().isIstepMode())
+ // Now we can assume that we are in Continuous IPL mode, just check if
+ // FFDC needs to be collected before continuing with IPL
+ else if(true == SbeRegAccess::theSbeRegAccess().isCollectFFDCSet())
{
- SBE_DEBUG(SBE_FUNC"Continuous IPL mode not set, will wait for "
- "commands...");
+ SBE_DEBUG(SBE_FUNC"FFDC Collect State - Waiting for FFDC to be picked");
(void)SbeRegAccess::theSbeRegAccess().
- updateSbeState(SBE_STATE_ISTEP);
+ updateSbeState(SBE_STATE_FFDC_COLLECT);
}
else
{
+ SBE_DEBUG(SBE_FUNC"Continuous IPL Mode set... IPLing");
+ (void)SbeRegAccess::theSbeRegAccess().
+ updateSbeState(SBE_STATE_IPLING);
sbeDoContinuousIpl();
}
diff --git a/sbe/sbefw/sbecmdreceiver.C b/sbe/sbefw/sbecmdreceiver.C
index dd99da50..b1d210cd 100644
--- a/sbe/sbefw/sbecmdreceiver.C
+++ b/sbe/sbefw/sbecmdreceiver.C
@@ -41,6 +41,7 @@
#include "sbeHostMsg.H"
#include "sbeHostUtils.H"
#include "sberegaccess.H"
+#include "sbeutil.H"
sbeFifoCmdReqBuf_t g_sbeFifoCmdHdr;
sbeCmdRespHdr_t g_sbeCmdRespHdr;
@@ -60,6 +61,9 @@ void sbeCommandReceiver_routine(void *i_pArg)
// is ready now to receive data on its interfaces
(void)SbeRegAccess::theSbeRegAccess().setSbeReady();
+ // Set Current State to First State i.e. Unknown
+ (void)SbeRegAccess::theSbeRegAccess().updateSbeState(SBE_STATE_UNKNOWN);
+
do
{
// @TODO via RTC: 128944
@@ -205,8 +209,31 @@ void sbeCommandReceiver_routine(void *i_pArg)
break;
}
- // @TODO via RTC: 126146
- // validate state machine constraints
+ // Need to return from receiver thread itself for fenced rejection
+ // of command, but there might be contention on the response sent
+ // over FIFO/Mailbox usage.
+ if(false == sbeIsCmdAllowedAtState(l_cmdClass, l_command))
+ {
+ // This command is not allowed in this state
+ SBE_ERROR("Chip-Op CmdClass[0x%02X] Cmd[0x%02X] not allowed in "
+ "State - [0x%04X] ",l_cmdClass,l_command,
+ SbeRegAccess::theSbeRegAccess().getSbeState());
+
+ if ( g_sbeIntrSource.isSet(SBE_RX_ROUTINE, SBE_INTERFACE_PSU) )
+ {
+ g_sbeSbe2PsuRespHdr.setStatus(SBE_PRI_INVALID_COMMAND,
+ SBE_SEC_COMMAND_NOT_ALLOWED_IN_THIS_STATE);
+ }
+ else if ( g_sbeIntrSource.isSet(SBE_RX_ROUTINE,
+ SBE_INTERFACE_FIFO) )
+ {
+ g_sbeCmdRespHdr.setStatus(SBE_PRI_INVALID_COMMAND,
+ SBE_SEC_COMMAND_NOT_ALLOWED_IN_THIS_STATE);
+ }
+
+ l_rc = SBE_SEC_COMMAND_NOT_ALLOWED_IN_THIS_STATE;
+ break;
+ }
} while (false); // Inner do..while ends
@@ -248,23 +275,31 @@ void sbeCommandReceiver_routine(void *i_pArg)
l_rcPk = pk_semaphore_post(&g_sbeSemCmdProcess);
}
+ // Handle Cmd not in a valid state here
+
if ((l_rcPk != PK_OK) || (l_rc != SBE_SEC_OPERATION_SUCCESSFUL))
{
- // It's likely a code bug or PK failure,
- // or any other PSU/FIFO access (scom) failure.
-
- // @TODO via RTC : 129166
- // Review if we need to add ASSERT here
+ if(l_rc != SBE_SEC_COMMAND_NOT_ALLOWED_IN_THIS_STATE)
+ {
+ // It's likely a code bug or PK failure,
+ // or any other PSU/FIFO access (scom) failure.
- // Add Error trace, collect FFDC and
- // continue wait for the next interrupt
- SBE_ERROR(SBE_FUNC"Unexpected failure, "
- "l_rcPk=[%d], g_sbeSemCmdProcess.count=[%d], l_rc=[%d]",
- l_rcPk, g_sbeSemCmdProcess.count, l_rc);
+ // @TODO via RTC : 129166
+ // Review if we need to add ASSERT here
+ // Add Error trace, collect FFDC and
+ // continue wait for the next interrupt
+ SBE_ERROR(SBE_FUNC"Unexpected failure, "
+ "l_rcPk=[%d], g_sbeSemCmdProcess.count=[%d], l_rc=[%d]",
+ l_rcPk, g_sbeSemCmdProcess.count, l_rc);
+ }
if ( g_sbeIntrSource.isSet(SBE_RX_ROUTINE,
SBE_INTERFACE_PSU) )
{
+ if(l_rc == SBE_SEC_COMMAND_NOT_ALLOWED_IN_THIS_STATE)
+ {
+ sbeHandlePsuResponse(l_rc);
+ }
g_sbeIntrSource.clearIntrSource(SBE_ALL_HANDLER,
SBE_INTERFACE_PSU);
pk_irq_enable(SBE_IRQ_HOST_PSU_INTR);
@@ -272,6 +307,10 @@ void sbeCommandReceiver_routine(void *i_pArg)
else if ( g_sbeIntrSource.isSet(SBE_RX_ROUTINE,
SBE_INTERFACE_FIFO) )
{
+ if(l_rc == SBE_SEC_COMMAND_NOT_ALLOWED_IN_THIS_STATE)
+ {
+ sbeHandleFifoResponse(l_rc);
+ }
g_sbeIntrSource.clearIntrSource(SBE_ALL_HANDLER,
SBE_INTERFACE_FIFO);
pk_irq_enable(SBE_IRQ_SBEFIFO_DATA);
diff --git a/sbe/sbefw/sbecmdscomaccess.C b/sbe/sbefw/sbecmdscomaccess.C
index bf0c208b..322f935d 100644
--- a/sbe/sbefw/sbecmdscomaccess.C
+++ b/sbe/sbefw/sbecmdscomaccess.C
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: sbe/sbefw/sbecmdscomaccess.C $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
/*
* @file: ppe/sbe/sbefw/sbecmdscomaccess.C
*
@@ -451,3 +475,13 @@ uint32_t sbePutScomUnderMask (uint8_t *i_pArg)
return l_rc;
#undef SBE_FUNC
}
+
+/////////////////////////////////////////////////////
+//////////////////////////////////////////////////////
+uint32_t sbeMultiScom (uint8_t *i_pArg)
+{
+ #define SBE_FUNC " sbeMultiScom "
+ return 0;
+ #undef SBE_FUNC
+}
+
diff --git a/sbe/sbefw/sbecmdscomaccess.H b/sbe/sbefw/sbecmdscomaccess.H
index 13c9549a..69d5e997 100644
--- a/sbe/sbefw/sbecmdscomaccess.H
+++ b/sbe/sbefw/sbecmdscomaccess.H
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: sbe/sbefw/sbecmdscomaccess.H $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
/*
* @file: ppe/sbe/sbefw/sbecmdscomaccess.H
*
@@ -58,5 +82,13 @@ uint32_t sbeModifyScom (uint8_t *i_pArg);
*/
uint32_t sbePutScomUnderMask (uint8_t *i_pArg);
+/**
+ * @brief sbeMultiScom:
+ *
+ * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
+ *
+ * @return Rc from the FIFO access utility
+ */
+uint32_t sbeMultiScom (uint8_t *i_pArg);
#endif /* __SBEFW_SBECMDSCOMACCESS_H */
diff --git a/sbe/sbefw/sbeevents.H b/sbe/sbefw/sbeevents.H
new file mode 100644
index 00000000..e6a69da2
--- /dev/null
+++ b/sbe/sbefw/sbeevents.H
@@ -0,0 +1,97 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: sbe/sbefw/sbeevents.H $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/*
+ * @file: ppe/sbe/sbefw/sbeevents.H
+ *
+ * @brief This file contains interfaces pertaining to the events for state
+ * transition trigger.
+ *
+ */
+
+#ifndef __SBEFW_SBEEVENTS_H
+#define __SBEFW_SBEEVENTS_H
+
+/**
+ * @brief An enumeration of all SBE state transition events
+ *
+ */
+enum sbeEvent
+{
+ SBE_CONTINUE_BOOT_PLCK_EVENT = 0x0, // From FFDC State
+ SBE_CONTINUE_BOOT_RUNTIME_EVENT = 0x1, // From FFDC State
+ SBE_RUNTIME_EVENT = 0x2, // From FFDC/Unknown/ISTEP/IPLING State
+ SBE_ISTEP_EVENT = 0x3, // From FFDC/Unknown State
+ SBE_PLCK_EVENT = 0x4, // From FFDC/Unknown state
+ SBE_DUMP_FAILURE_EVENT = 0x5, // From IPLING/RUNTIME/MPIPL/DMT/Unknown State
+ SBE_ENTER_MPIPL_EVENT = 0x6, // From Runtime State
+ SBE_CONTINUE_MPIPL_EVENT = 0x7, // From MPIPL Wait State
+ SBE_ABORT_EVENT = 0x8, // From Any state
+ SBE_DMT_ENTER_EVENT = 0x9, // From Runtime State
+ SBE_DMT_COMP_EVENT = 0xA, // From DMT State
+ SBE_FAILURE_EVENT = 0xB, // From Any State
+ SBE_FFDC_COLLECT_EVENT = 0xC, // From Unknown State
+};
+
+// Maximum number of Events per State
+enum maxEventPerState
+{
+ SBE_STATE_UNKNOWN_MAX_EVENT = 5,
+ SBE_STATE_FFDC_COLLECT_MAX_EVENT = 4,
+ SBE_STATE_IPLING_MAX_EVENT = 4,
+ SBE_STATE_ISTEP_MAX_EVENT = 3,
+ SBE_STATE_RUNTIME_MAX_EVENT = 4,
+ SBE_STATE_MPIPL_MAX_EVENT = 2,
+ SBE_STATE_DMT_MAX_EVENT = 1,
+ SBE_STATE_DUMP_MAX_EVENT = 0,
+ SBE_STATE_FAILURE_MAX_EVENT = 0,
+ SBE_STATE_QUIESCE_MAX_EVENT = 0,
+ SBE_STATE_ABORT_MAX_EVENT = 0,
+
+ // Total number of State Transition Events, Addition of all the above
+ SBE_MAX_TRANSITIONS = 23,
+};
+
+
+// Entry Point to stateTransitionStr_t Map Structure, This adds up all the state
+// transition of the previous state, If any more transition is added, this will
+// add up to all subsequent entries. This is closely mapped with the sbestates.H
+// as well.
+enum entryToStateMap
+{
+ SBE_STATE_UNKNOWN_ENTRY_TO_MAP = 0,
+ SBE_STATE_FFDC_COLLECT_ENTRY_TO_MAP = SBE_STATE_UNKNOWN_ENTRY_TO_MAP + SBE_STATE_UNKNOWN_MAX_EVENT, // 5
+ SBE_STATE_IPLING_ENTRY_TO_MAP = SBE_STATE_FFDC_COLLECT_ENTRY_TO_MAP + SBE_STATE_FFDC_COLLECT_MAX_EVENT, //9
+ SBE_STATE_ISTEP_ENTRY_TO_MAP = SBE_STATE_IPLING_ENTRY_TO_MAP + SBE_STATE_IPLING_MAX_EVENT, //13
+ SBE_STATE_RUNTIME_ENTRY_TO_MAP = SBE_STATE_ISTEP_ENTRY_TO_MAP + SBE_STATE_ISTEP_MAX_EVENT, //16
+ SBE_STATE_MPIPL_ENTRY_TO_MAP = SBE_STATE_RUNTIME_ENTRY_TO_MAP + SBE_STATE_RUNTIME_MAX_EVENT, //20
+ SBE_STATE_DMT_ENTRY_TO_MAP = SBE_STATE_MPIPL_ENTRY_TO_MAP + SBE_STATE_MPIPL_MAX_EVENT, //22
+ SBE_STATE_DUMP_ENTRY_TO_MAP = SBE_STATE_DMT_ENTRY_TO_MAP + SBE_STATE_DMT_MAX_EVENT, //23
+ SBE_STATE_FAILURE_ENTRY_TO_MAP = SBE_STATE_DUMP_ENTRY_TO_MAP + SBE_STATE_DUMP_MAX_EVENT, //23
+ SBE_STATE_QUIESCE_ENTRY_TO_MAP = SBE_STATE_FAILURE_ENTRY_TO_MAP + SBE_STATE_FAILURE_MAX_EVENT, //23
+ SBE_STATE_ABORT_ENTRY_TO_MAP = SBE_STATE_QUIESCE_ENTRY_TO_MAP + SBE_STATE_QUIESCE_MAX_EVENT, //23
+};
+
+#endif //__SBEFW_SBEEVENTS_H
+
diff --git a/sbe/sbefw/sbemain.C b/sbe/sbefw/sbemain.C
index accf5e98..86cf2cc7 100644
--- a/sbe/sbefw/sbemain.C
+++ b/sbe/sbefw/sbemain.C
@@ -325,9 +325,9 @@ uint32_t main(int argc, char **argv)
if( fapiRc != fapi2::FAPI2_RC_SUCCESS )
{
SBE_ERROR(SBE_FUNC"plat_TargetsInit failed");
- // TODO via RTC 126146.
- // Set the state to Failure and remove break statement. It will
- // enable FSP to get FFDC for this failure.
+ (void)SbeRegAccess::theSbeRegAccess().
+ stateTransition(SBE_FAILURE_EVENT);
+ // Hard Reset SBE to recover
break;
}
@@ -336,9 +336,9 @@ uint32_t main(int argc, char **argv)
SBE_ERROR(SBE_FUNC"Failed to initialize SbeRegAccess");
// init failure could mean the below will fail too, but attempt it
// anyway
- (void)SbeRegAccess::theSbeRegAccess().updateSbeState(SBE_STATE_DUMP);
- // TODO: via RTC 126146 : Decide if we should really break here or
- // continue in the failed state.
+ (void)SbeRegAccess::theSbeRegAccess().stateTransition(
+ SBE_FAILURE_EVENT);
+ // Hard Reset SBE to recover
break;
}
diff --git a/sbe/sbefw/sberegaccess.C b/sbe/sbefw/sberegaccess.C
index 2dbbe8b3..2d886465 100644
--- a/sbe/sbefw/sberegaccess.C
+++ b/sbe/sbefw/sberegaccess.C
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: sbe/sbefw/sberegaccess.C $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
/*
* @file: ppe/sbe/sbefw/sberegaccess.C
*
@@ -13,11 +37,100 @@
using namespace fapi2;
+// Struct to Map Current State - Event - Final State Transition
+typedef struct stateTransitionStr
+{
+ uint16_t currState:4;
+ uint16_t event:4;
+ uint16_t finalState:4;
+ uint16_t reserved:4;
+} stateTransitionStr_t;
+
+// Start and End point of Event Transition in stateTransMap Table
+typedef struct stateEventRangeStr
+{
+ uint16_t start:8;
+ uint16_t end:8;
+}stateEventRangeStr_t;
+
+// Entry Point and End point to the StateTransition Map for a State
+// It is sequenced as per the sbeState enum, Don't change the sequence
+// of states. Events are incremented w.r.t previous event.
+static const stateEventRangeStr_t eventRangePerState[SBE_MAX_STATE] =
+{
+ {SBE_STATE_UNKNOWN_ENTRY_TO_MAP, SBE_STATE_UNKNOWN_MAX_EVENT},
+ {SBE_STATE_FFDC_COLLECT_ENTRY_TO_MAP, SBE_STATE_FFDC_COLLECT_MAX_EVENT},
+ {SBE_STATE_IPLING_ENTRY_TO_MAP, SBE_STATE_IPLING_MAX_EVENT},
+ {SBE_STATE_ISTEP_ENTRY_TO_MAP, SBE_STATE_ISTEP_MAX_EVENT},
+ {SBE_STATE_RUNTIME_ENTRY_TO_MAP, SBE_STATE_RUNTIME_MAX_EVENT},
+ {SBE_STATE_MPIPL_ENTRY_TO_MAP, SBE_STATE_MPIPL_MAX_EVENT},
+ {SBE_STATE_DMT_ENTRY_TO_MAP, SBE_STATE_DMT_MAX_EVENT},
+ {SBE_STATE_DUMP_ENTRY_TO_MAP, SBE_STATE_DUMP_MAX_EVENT},
+ {SBE_STATE_FAILURE_ENTRY_TO_MAP, SBE_STATE_FAILURE_MAX_EVENT},
+ {SBE_STATE_QUIESCE_ENTRY_TO_MAP, SBE_STATE_QUIESCE_MAX_EVENT},
+ {SBE_STATE_ABORT_ENTRY_TO_MAP, SBE_STATE_ABORT_MAX_EVENT},
+};
+
+// Map to connect the current State with an event along with the final state
+// transition. It is sequenced according to the sbeState enums, Don't change the
+// sequence of states.
+static const stateTransitionStr_t stateTransMap[SBE_MAX_TRANSITIONS] = {
+ {SBE_STATE_UNKNOWN, SBE_FAILURE_EVENT, SBE_STATE_FAILURE},
+ {SBE_STATE_UNKNOWN, SBE_RUNTIME_EVENT, SBE_STATE_RUNTIME},
+ {SBE_STATE_UNKNOWN, SBE_ISTEP_EVENT, SBE_STATE_ISTEP},
+ {SBE_STATE_UNKNOWN, SBE_PLCK_EVENT, SBE_STATE_IPLING},
+ {SBE_STATE_UNKNOWN, SBE_FFDC_COLLECT_EVENT, SBE_STATE_FFDC_COLLECT},
+ {SBE_STATE_FFDC_COLLECT, SBE_CONTINUE_BOOT_PLCK_EVENT, SBE_STATE_IPLING},
+ {SBE_STATE_FFDC_COLLECT, SBE_CONTINUE_BOOT_RUNTIME_EVENT, SBE_STATE_RUNTIME},
+ {SBE_STATE_FFDC_COLLECT, SBE_ISTEP_EVENT, SBE_STATE_ISTEP},
+ {SBE_STATE_FFDC_COLLECT, SBE_FAILURE_EVENT, SBE_STATE_DUMP},
+ {SBE_STATE_IPLING, SBE_RUNTIME_EVENT, SBE_STATE_RUNTIME},
+ {SBE_STATE_IPLING, SBE_DUMP_FAILURE_EVENT, SBE_STATE_DUMP},
+ {SBE_STATE_IPLING, SBE_FAILURE_EVENT, SBE_STATE_FAILURE},
+ {SBE_STATE_IPLING, SBE_ABORT_EVENT, SBE_STATE_ABORT},
+ {SBE_STATE_ISTEP, SBE_RUNTIME_EVENT, SBE_STATE_RUNTIME},
+ {SBE_STATE_ISTEP, SBE_ABORT_EVENT, SBE_STATE_ABORT},
+ {SBE_STATE_ISTEP, SBE_FAILURE_EVENT, SBE_STATE_FAILURE},
+ {SBE_STATE_RUNTIME, SBE_DUMP_FAILURE_EVENT, SBE_STATE_DUMP},
+ {SBE_STATE_RUNTIME, SBE_ENTER_MPIPL_EVENT, SBE_STATE_MPIPL},
+ {SBE_STATE_RUNTIME, SBE_DMT_ENTER_EVENT, SBE_STATE_DMT},
+ {SBE_STATE_RUNTIME, SBE_FAILURE_EVENT, SBE_STATE_FAILURE},
+ {SBE_STATE_MPIPL, SBE_CONTINUE_MPIPL_EVENT, SBE_STATE_RUNTIME},
+ {SBE_STATE_MPIPL, SBE_DUMP_FAILURE_EVENT, SBE_STATE_DUMP},
+ {SBE_STATE_DMT, SBE_DMT_COMP_EVENT, SBE_STATE_RUNTIME},
+};
+
/**
* @brief Initizlize the class
*
* @return An RC indicating success/failure
*/
+
+void SbeRegAccess::stateTransition(const sbeEvent &i_event)
+{
+ #define SBE_FUNC "SbeRegAccess::stateTransition "
+ //Fetch Current State
+ uint32_t l_state = (uint32_t)getSbeState();
+ uint8_t l_startCnt = eventRangePerState[l_state].start;
+ SBE_INFO(SBE_FUNC "Event Received %d CurrState 0x%08X StartCnt%d EndCnt%d",
+ i_event, l_state, l_startCnt, eventRangePerState[l_state].end);
+ // Fetch the final State from the Map
+ while(l_startCnt <
+ (eventRangePerState[l_state].end + eventRangePerState[l_state].start))
+ {
+ if(stateTransMap[l_startCnt].event == i_event)
+ {
+ SBE_INFO(SBE_FUNC "Updating State as %d",
+ (sbeState)stateTransMap[l_startCnt].finalState);
+ updateSbeState((sbeState)stateTransMap[l_startCnt].finalState);
+ break;
+ }
+ else
+ ++l_startCnt;
+ }
+ #undef SBE_FUNC
+}
+
uint32_t SbeRegAccess::init()
{
#define SBE_FUNC "SbeRegAccess::SbeRegAccess "
diff --git a/sbe/sbefw/sberegaccess.H b/sbe/sbefw/sberegaccess.H
index e89f4d82..dad80939 100644
--- a/sbe/sbefw/sberegaccess.H
+++ b/sbe/sbefw/sberegaccess.H
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: sbe/sbefw/sberegaccess.H $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
/*
* @file: ppe/sbe/sbefw/sberegaccess.H
*
@@ -10,6 +34,7 @@
#include <stdint.h>
#include "sbestates.H"
+#include "sbeevents.H"
/**
* @brief Utility singleton that SBEFW can use to read write various scratch
@@ -162,6 +187,24 @@ class SbeRegAccess
return iv_isSlave;
}
+ /**
+ * @brief Get the SBE current State
+ *
+ * @return SBE current State, sbeState enum
+ *
+ */
+ uint64_t getSbeState() const
+ {
+ return iv_currState;
+ }
+
+ /**
+ * @brief Update the SBE State as per the transition event
+ *
+ * @param [in] i_event Transition Event
+ */
+ void stateTransition(const sbeEvent &i_event);
+
private:
/**
diff --git a/sbe/sbefw/sbestates.H b/sbe/sbefw/sbestates.H
index 4c01c218..525888a6 100644
--- a/sbe/sbefw/sbestates.H
+++ b/sbe/sbefw/sbestates.H
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: sbe/sbefw/sbestates.H $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
/*
* @file: ppe/sbe/sbefw/sbestates.H
*
@@ -14,16 +38,22 @@
*/
enum sbeState
{
- SBE_STATE_UNKNOWN = 0, // Unkown, initial state
- SBE_STATE_FFDC = 1, // Waiting for FFDC collection after a reset
- SBE_STATE_IPLING = 2, // IPL'ing - autonomous mode (transient)
- SBE_STATE_ISTEP = 3, // ISTEP - Running IPL by steps (transient)
- SBE_STATE_RUNTIME = 4, // SBE Runtime
- SBE_STATE_DUMP = 5, // Dumping (transient?)
- SBE_STATE_MPIPL = 6, // MPIPL (transient)
- SBE_STATE_FAILURE = 7, // Internal SBE failure
- SBE_STATE_ABORT = 8, // SBE was asked to to abort - need reset to get out
- SBE_STATE_QUIESCE = 0xF, // Final state - needs SBE reset to get out
+ SBE_STATE_UNKNOWN = 0x0, // Unkown, initial state
+ SBE_STATE_FFDC_COLLECT = 0x1, // Waiting for FFDC collection after a reset
+ SBE_STATE_IPLING = 0x2, // IPL'ing - autonomous mode (transient)
+ SBE_STATE_ISTEP = 0x3, // ISTEP - Running IPL by steps (transient)
+ SBE_STATE_RUNTIME = 0x4, // SBE Runtime
+ SBE_STATE_MPIPL = 0x5, // MPIPL
+ SBE_STATE_DMT = 0x6, // Dead Man Timer State (transient)
+ SBE_STATE_DUMP = 0x7, // Dumping
+ SBE_STATE_FAILURE = 0x8, // Internal SBE failure
+ SBE_STATE_QUIESCE = 0x9, // Final state - needs SBE reset to get out
+ SBE_STATE_ABORT = 0xA, // SBE was asked to abort - need reset to get out
+
+ // Max States, Always keep it at the last of the enum and sequential
+ SBE_MAX_STATE = 0xB,
+ // Don't count this in the state, just to intialize the state variables
+ SBE_INVALID_STATE = 0xF,
};
enum sbeRole
diff --git a/sbe/sbefw/sbeutil.H b/sbe/sbefw/sbeutil.H
index 57d55544..bf34791d 100644
--- a/sbe/sbefw/sbeutil.H
+++ b/sbe/sbefw/sbeutil.H
@@ -38,6 +38,10 @@ if ((l_rc) != SBE_SEC_OPERATION_SUCCESSFUL) \
break; \
} \
+void sbeHandleFifoResponse (const uint32_t i_rc);
+
+void sbeHandlePsuResponse (const uint32_t i_rc);
+
namespace SBE
{
diff --git a/sbe/test/testAbort.py b/sbe/test/testAbort.py
new file mode 100755
index 00000000..eca8a6eb
--- /dev/null
+++ b/sbe/test/testAbort.py
@@ -0,0 +1,58 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: sbe/test/testAbort.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testUtil
+err = False
+
+TESTDATA = [0,0,0,2,
+ 0,0,0xA8,0x04 ]
+
+EXPDATA = [0xc0,0xde,0xa8,0x04,
+ 0x0,0x0,0x0,0x0,
+ 0x00,0x0,0x0,0x3];
+
+
+# MAIN Test Run Starts Here...
+#-------------------------------------------------
+def main( ):
+ testUtil.runCycles( 10000000 )
+ testUtil.writeUsFifo( TESTDATA )
+ testUtil.writeEot( )
+ testUtil.readDsFifo( EXPDATA )
+ testUtil.readEot( )
+
+#-------------------------------------------------
+# Calling all test code
+#-------------------------------------------------
+main()
+
+if err:
+ print ("\nTest Suite completed with error(s)")
+ #sys.exit(1)
+else:
+ print ("\nTest Suite completed with no errors")
+ #sys.exit(0);
+
diff --git a/sbe/test/testContinueMpipl.py b/sbe/test/testContinueMpipl.py
new file mode 100755
index 00000000..37822d89
--- /dev/null
+++ b/sbe/test/testContinueMpipl.py
@@ -0,0 +1,58 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: sbe/test/testContinueMpipl.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testUtil
+err = False
+
+TESTDATA = [0,0,0,2,
+ 0,0,0xA9,0x02 ]
+
+EXPDATA = [0xc0,0xde,0xa9,0x02,
+ 0x0,0x0,0x0,0x0,
+ 0x00,0x0,0x0,0x3];
+
+
+# MAIN Test Run Starts Here...
+#-------------------------------------------------
+def main( ):
+ testUtil.runCycles( 10000000 )
+ testUtil.writeUsFifo( TESTDATA )
+ testUtil.writeEot( )
+ testUtil.readDsFifo( EXPDATA )
+ testUtil.readEot( )
+
+#-------------------------------------------------
+# Calling all test code
+#-------------------------------------------------
+main()
+
+if err:
+ print ("\nTest Suite completed with error(s)")
+ #sys.exit(1)
+else:
+ print ("\nTest Suite completed with no errors")
+ #sys.exit(0);
+
diff --git a/sbe/test/testContinueSbeBoot.py b/sbe/test/testContinueSbeBoot.py
new file mode 100755
index 00000000..e8ba019c
--- /dev/null
+++ b/sbe/test/testContinueSbeBoot.py
@@ -0,0 +1,58 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: sbe/test/testContinueSbeBoot.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testUtil
+err = False
+
+TESTDATA = [0,0,0,2,
+ 0,0,0xA1,0x02 ]
+
+EXPDATA = [0xc0,0xde,0xa1,0x02,
+ 0x0,0x0,0x0,0x0,
+ 0x00,0x0,0x0,0x3];
+
+
+# MAIN Test Run Starts Here...
+#-------------------------------------------------
+def main( ):
+ testUtil.runCycles( 10000000 )
+ testUtil.writeUsFifo( TESTDATA )
+ testUtil.writeEot( )
+ testUtil.readDsFifo( EXPDATA )
+ testUtil.readEot( )
+
+#-------------------------------------------------
+# Calling all test code
+#-------------------------------------------------
+main()
+
+if err:
+ print ("\nTest Suite completed with error(s)")
+ #sys.exit(1)
+else:
+ print ("\nTest Suite completed with no errors")
+ #sys.exit(0);
+
diff --git a/sbe/test/testEnterMpipl.py b/sbe/test/testEnterMpipl.py
new file mode 100755
index 00000000..23686fe4
--- /dev/null
+++ b/sbe/test/testEnterMpipl.py
@@ -0,0 +1,58 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: sbe/test/testEnterMpipl.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testUtil
+err = False
+
+TESTDATA = [0,0,0,2,
+ 0,0,0xA9,0x01 ]
+
+EXPDATA = [0xc0,0xde,0xa9,0x01,
+ 0x0,0x0,0x0,0x0,
+ 0x00,0x0,0x0,0x3];
+
+
+# MAIN Test Run Starts Here...
+#-------------------------------------------------
+def main( ):
+ testUtil.runCycles( 10000000 )
+ testUtil.writeUsFifo( TESTDATA )
+ testUtil.writeEot( )
+ testUtil.readDsFifo( EXPDATA )
+ testUtil.readEot( )
+
+#-------------------------------------------------
+# Calling all test code
+#-------------------------------------------------
+main()
+
+if err:
+ print ("\nTest Suite completed with error(s)")
+ #sys.exit(1)
+else:
+ print ("\nTest Suite completed with no errors")
+ #sys.exit(0);
+
diff --git a/sbe/test/testFifoReset.xml b/sbe/test/testFifoReset.xml
index 42c125d9..672d2c5a 100644
--- a/sbe/test/testFifoReset.xml
+++ b/sbe/test/testFifoReset.xml
@@ -1,3 +1,27 @@
+<!-- IBM_PROLOG_BEGIN_TAG -->
+<!-- This is an automatically generated prolog. -->
+<!-- -->
+<!-- $Source: sbe/test/testFifoReset.xml $ -->
+<!-- -->
+<!-- OpenPOWER sbe Project -->
+<!-- -->
+<!-- Contributors Listed Below - COPYRIGHT 2016 -->
+<!-- [+] International Business Machines Corp. -->
+<!-- -->
+<!-- -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
+<!-- you may not use this file except in compliance with the License. -->
+<!-- You may obtain a copy of the License at -->
+<!-- -->
+<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
+<!-- -->
+<!-- Unless required by applicable law or agreed to in writing, software -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
+<!-- implied. See the License for the specific language governing -->
+<!-- permissions and limitations under the License. -->
+<!-- -->
+<!-- IBM_PROLOG_END_TAG -->
<?xml version="1.0" encoding="UTF-8"?>
<!-- SBE FIFO reset Test case -->
@@ -7,6 +31,6 @@
</testcase>
<!-- An istep chip-op should succeed post the FIFO reset -->
<testcase>
- <simcmd>run-python-file targets/p9_nimbus/sbeTest/testIstepInvalid.py</simcmd>
+ <simcmd>run-python-file targets/p9_nimbus/sbeTest/testIstepInvalidFenced.py</simcmd>
<exitonerror>yes</exitonerror>
</testcase>
diff --git a/sbe/test/testIstep.xml b/sbe/test/testIstep.xml
index 40592e41..0e371e79 100644
--- a/sbe/test/testIstep.xml
+++ b/sbe/test/testIstep.xml
@@ -1,5 +1,34 @@
+<!-- IBM_PROLOG_BEGIN_TAG -->
+<!-- This is an automatically generated prolog. -->
+<!-- -->
+<!-- $Source: sbe/test/testIstep.xml $ -->
+<!-- -->
+<!-- OpenPOWER sbe Project -->
+<!-- -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2016 -->
+<!-- [+] International Business Machines Corp. -->
+<!-- -->
+<!-- -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
+<!-- you may not use this file except in compliance with the License. -->
+<!-- You may obtain a copy of the License at -->
+<!-- -->
+<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
+<!-- -->
+<!-- Unless required by applicable law or agreed to in writing, software -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
+<!-- implied. See the License for the specific language governing -->
+<!-- permissions and limitations under the License. -->
+<!-- -->
+<!-- IBM_PROLOG_END_TAG -->
<?xml version="1.0" encoding="UTF-8"?>
+ <!-- Invalid Istep Test case -->
+ <testcase>
+ <simcmd>run-python-file targets/p9_nimbus/sbeTest/testIstepInvalid.py</simcmd>
+ <exitonerror>yes</exitonerror>
+ </testcase>
<!-- Positive Istep Test case -->
<testcase>
<simcmd>sbe-istep 2 2</simcmd>
@@ -299,6 +328,6 @@
</testcase>
<!-- Invalid Istep Test case -->
<testcase>
- <simcmd>run-python-file targets/p9_nimbus/sbeTest/testIstepInvalid.py</simcmd>
+ <simcmd>run-python-file targets/p9_nimbus/sbeTest/testIstepInvalidFenced.py</simcmd>
<exitonerror>yes</exitonerror>
</testcase>
diff --git a/sbe/test/testIstepInvalid.py b/sbe/test/testIstepInvalid.py
index 891ddecf..2d158a3a 100755
--- a/sbe/test/testIstepInvalid.py
+++ b/sbe/test/testIstepInvalid.py
@@ -1,3 +1,27 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: sbe/test/testIstepInvalid.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2015,2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
import sys
sys.path.append("targets/p9_nimbus/sbeTest" )
import testUtil
@@ -9,7 +33,7 @@ TESTDATA = [0,0,0,3,
0,0x02,0x00,0x1]
EXPDATA = [0xc0,0xde,0xa1,0x01,
- 0x0,0x2,0x0,0xa,
+ 0x00,0x02,0x00,0x0A,
0x00,0x0,0x0,0x03];
# MAIN Test Run Starts Here...
diff --git a/sbe/test/testIstepInvalidFenced.py b/sbe/test/testIstepInvalidFenced.py
new file mode 100755
index 00000000..1d067139
--- /dev/null
+++ b/sbe/test/testIstepInvalidFenced.py
@@ -0,0 +1,58 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: sbe/test/testIstepInvalidFenced.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2015,2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testUtil
+err = False
+#from testWrite import *
+
+TESTDATA = [0,0,0,3,
+ 0,0,0xA1,0x01,
+ 0,0x02,0x00,0x1]
+
+EXPDATA = [0xc0,0xde,0xa1,0x01,
+ 0x00,0x00,0x00,0x08,
+ 0x00,0x0,0x0,0x03];
+
+# MAIN Test Run Starts Here...
+#-------------------------------------------------
+def main( ):
+ testUtil.runCycles( 10000000 )
+ testUtil.writeUsFifo( TESTDATA )
+ testUtil.writeEot( )
+ testUtil.readDsFifo( EXPDATA )
+ testUtil.readEot( )
+#-------------------------------------------------
+# Calling all test code
+#-------------------------------------------------
+main()
+
+if err:
+ print ("\nTest Suite completed with error(s)")
+ #sys.exit(1)
+else:
+ print ("\nTest Suite completed with no errors")
+ #sys.exit(0);
+
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