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authorSantosh Puranik <santosh.puranik@in.ibm.com>2016-05-09 11:42:52 -0500
committerPrachi Gupta <pragupta@us.ibm.com>2016-06-08 11:45:52 -0500
commitd8e942c7bf09874cca9d0c55fe211370641b1808 (patch)
tree1615acad2a1d13a5afd2c52c4a7a13062e971347 /sbe/sbefw
parent257861dcd4b5a7cce8b09c936ec26f8a9d36bc37 (diff)
downloadtalos-sbe-d8e942c7bf09874cca9d0c55fe211370641b1808.tar.gz
talos-sbe-d8e942c7bf09874cca9d0c55fe211370641b1808.zip
RTC: 126147
FIFO Reset support Change-Id: I1654d4a5a72bebd0764c2f560030057bf984cc31 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23042 Tested-by: Jenkins Server Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Diffstat (limited to 'sbe/sbefw')
-rw-r--r--sbe/sbefw/sbecmdprocessor.C13
-rw-r--r--sbe/sbefw/sbecmdreceiver.C48
-rw-r--r--sbe/sbefw/sbeexeintf.H9
-rw-r--r--sbe/sbefw/sbeirq.C8
-rw-r--r--sbe/sbefw/sbemain.C6
5 files changed, 55 insertions, 29 deletions
diff --git a/sbe/sbefw/sbecmdprocessor.C b/sbe/sbefw/sbecmdprocessor.C
index f9be47b9..f5fb0f90 100644
--- a/sbe/sbefw/sbecmdprocessor.C
+++ b/sbe/sbefw/sbecmdprocessor.C
@@ -109,9 +109,6 @@ void sbeHandleFifoResponse (const uint32_t i_rc)
// Handle FIFO reset case
if (i_rc == SBE_FIFO_RESET_RECEIVED)
{
- // @TODO via RTC : 126147
- // Handle FIFO reset flow
- pk_irq_enable(SBE_IRQ_SBEFIFO_DATA);
break;
}
@@ -248,6 +245,14 @@ void sbeSyncCommandProcessor_routine(void *i_pArg)
l_primStatus = g_sbeCmdRespHdr.prim_status;
l_rc = g_sbeCmdRespHdr.sec_status;
}
+ else // SBE_INTERFACE_FIFO_RESET or SBE_INTERFACE_UNKNOWN
+ {
+ SBE_ERROR(SBE_FUNC"Unexpected interrupt communicated to the "
+ "processor thread. Interrupt source: 0x%02X",
+ g_sbeIntrSource.l_intrSource);
+ assert(false);
+ break;
+ }
SBE_DEBUG (SBE_FUNC"l_primStatus=[0x%04X], l_rc=[0x%04X]",
l_primStatus, l_rc);
@@ -325,8 +330,8 @@ void sbeSyncCommandProcessor_routine(void *i_pArg)
// Enable the new data available interrupt
g_sbeIntrSource.clearIntrSource(SBE_INTERFACE_FIFO);
pk_irq_enable(SBE_IRQ_SBEFIFO_DATA);
+ pk_irq_enable(SBE_IRQ_SBEFIFO_RESET);
}
-
} while(true); // Thread always exists
}
diff --git a/sbe/sbefw/sbecmdreceiver.C b/sbe/sbefw/sbecmdreceiver.C
index 415e23c6..94a44ce1 100644
--- a/sbe/sbefw/sbecmdreceiver.C
+++ b/sbe/sbefw/sbecmdreceiver.C
@@ -71,6 +71,14 @@ void sbeCommandReceiver_routine(void *i_pArg)
// the FIFO or PSU interfaces to be able to decode the command
// class and the command opcode parameters.
+ // Received FIFO Reset interrupt
+ if ( g_sbeIntrSource.isSet(SBE_INTERFACE_FIFO_RESET) )
+ {
+ SBE_ERROR(SBE_FUNC"FIFO reset received");
+ l_rc = SBE_FIFO_RESET_RECEIVED;
+ break;
+ }
+
// Received PSU interrupt
if ( g_sbeIntrSource.isSet(SBE_INTERFACE_PSU) )
{
@@ -91,7 +99,7 @@ void sbeCommandReceiver_routine(void *i_pArg)
l_command = g_sbePsu2SbeCmdReqHdr.command;
} // end if loop for PSU interface chipOp handling
- // Received FIFO interrupt
+ // Received FIFO New Data interrupt
else if ( g_sbeIntrSource.isSet(SBE_INTERFACE_FIFO) ) {
// This thread will attempt to unblock the command processor
@@ -115,14 +123,6 @@ void sbeCommandReceiver_routine(void *i_pArg)
if (l_rc == SBE_FIFO_RESET_RECEIVED)
{
SBE_ERROR(SBE_FUNC"FIFO reset received");
- g_sbeCmdRespHdr.prim_status =
- (uint16_t)l_rc;
- g_sbeCmdRespHdr.sec_status =
- (uint16_t)l_rc;
-
- // Reassign l_rc to Success to Unblock command processor
- // thread and let that take the necessary action.
- l_rc = SBE_SEC_OPERATION_SUCCESSFUL;
break;
}
@@ -182,8 +182,36 @@ void sbeCommandReceiver_routine(void *i_pArg)
} while (false); // Inner do..while ends
+ // If there was a FIFO reset request,
+ if (l_rc == SBE_FIFO_RESET_RECEIVED)
+ {
+ // Perform FIFO Reset
+ uint32_t l_rc = sbeUpFifoPerformReset();
+ if (l_rc)
+ {
+ // Perform FIFO Reset failed
+ SBE_ERROR(SBE_FUNC"Perform FIFO Reset failed, "
+ "l_rc=[0x%08X]", l_rc);
+ // Collect FFDC?
+ }
+
+ if ( g_sbeIntrSource.isSet(SBE_INTERFACE_FIFO) )
+ {
+ g_sbeIntrSource.clearIntrSource(SBE_INTERFACE_FIFO);
+ }
+
+ if ( g_sbeIntrSource.isSet(SBE_INTERFACE_FIFO_RESET) )
+ {
+ g_sbeIntrSource.clearIntrSource(SBE_INTERFACE_FIFO_RESET);
+ }
+
+ pk_irq_enable(SBE_IRQ_SBEFIFO_DATA);
+ pk_irq_enable(SBE_IRQ_SBEFIFO_RESET);
+ continue;
+ } // FIFO reset handling ends
+
// Unblock the command processor thread
- // if we could dequeue the header successfully
+ // if we could dequeue the header successfully,
if ((l_rcPk == PK_OK) && (l_rc == SBE_SEC_OPERATION_SUCCESSFUL))
{
l_rcPk = pk_semaphore_post(&g_sbeSemCmdProcess);
diff --git a/sbe/sbefw/sbeexeintf.H b/sbe/sbefw/sbeexeintf.H
index e4eef8dd..6f43784d 100644
--- a/sbe/sbefw/sbeexeintf.H
+++ b/sbe/sbefw/sbeexeintf.H
@@ -76,14 +76,6 @@ extern PkSemaphore g_sbeSemCmdRecv;
*/
extern PkSemaphore g_sbeSemCmdProcess;
-/**
- * @brief Global semaphore : g_sbeSemFifoReset
- *
- * This is used to synchronize the graceful handling of FIFO reset
- * between command receiver and synchronous command processor threads.
- *
- */
-extern PkSemaphore g_sbeSemFifoReset;
/**
* @brief SBE Interface source
@@ -94,6 +86,7 @@ typedef enum
SBE_INTERFACE_UNKNOWN = 0x00,
SBE_INTERFACE_FIFO = 0x01,
SBE_INTERFACE_PSU = 0x02,
+ SBE_INTERFACE_FIFO_RESET = 0x04,
} sbeInterfaceSrc_t;
/**
diff --git a/sbe/sbefw/sbeirq.C b/sbe/sbefw/sbeirq.C
index c2f3b616..0f160509 100644
--- a/sbe/sbefw/sbeirq.C
+++ b/sbe/sbefw/sbeirq.C
@@ -36,8 +36,13 @@ void sbe_interrupt_handler (void *i_pArg, PkIrqId i_irq)
break;
case SBE_IRQ_SBEFIFO_DATA:
- case SBE_IRQ_SBEFIFO_RESET:
g_sbeIntrSource.setIntrSource(SBE_INTERFACE_FIFO);
+ pk_irq_disable(SBE_IRQ_SBEFIFO_RESET);
+ break;
+
+ case SBE_IRQ_SBEFIFO_RESET:
+ g_sbeIntrSource.setIntrSource(SBE_INTERFACE_FIFO_RESET);
+ pk_irq_disable(SBE_IRQ_SBEFIFO_DATA);
break;
default:
@@ -118,3 +123,4 @@ int sbeIRQSetup (void)
return l_rc;
#undef SBE_FUNC
}
+
diff --git a/sbe/sbefw/sbemain.C b/sbe/sbefw/sbemain.C
index 0502c2bf..0761d704 100644
--- a/sbe/sbefw/sbemain.C
+++ b/sbe/sbefw/sbemain.C
@@ -24,7 +24,6 @@
////////////////////////////////////////////////////////////////
PkSemaphore g_sbeSemCmdRecv;
PkSemaphore g_sbeSemCmdProcess;
-PkSemaphore g_sbeSemFifoReset;
////////////////////////////////////////////////////////////////
// @brief Stacks for Non-critical Interrupts and Threads
@@ -113,11 +112,6 @@ uint32_t sbeInitSems(void)
{
break;
}
- l_rc = pk_semaphore_create(&g_sbeSemFifoReset, 0, 1);
- if (l_rc)
- {
- break;
- }
} while (false);
if (l_rc)
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