diff options
author | Joe McGill <jmcgill@us.ibm.com> | 2016-08-20 12:16:28 -0500 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-09-01 02:33:20 -0400 |
commit | 90872a0af9cd63af3379f68d88faf671920f8ba8 (patch) | |
tree | 7665bc1e64c9f77ed2d44c2d42ea57a6c51e6f7c /import | |
parent | f559f31a1d92982b8bfc07c21a496a62e9ba9f5d (diff) | |
download | talos-sbe-90872a0af9cd63af3379f68d88faf671920f8ba8.tar.gz talos-sbe-90872a0af9cd63af3379f68d88faf671920f8ba8.zip |
VBU IPL regression framework updates
run_ipl
ipl_base.inc
Add SMT mode support
Add execution of TOD isteps
Correct istep names
Condense isteps 0-4 to call by number
p9_sim_get_nia
Supoprt multi-threaded state extraction
Remove attribute checks
p9_sim_model_boot
Initialize PNOR osc for all model types
Add f.x debug to force Cronus call to SD fsi_init()
Remove redundant sticks
p9_abus_scominit
Add L1 placeholder for Cronus (if needed, only for Cumulus)
nest_attributes.xml
p9_sbe_load_bootloader_attributes.xml
Add initToZero tags on selected attributes
model config files
Default to scan-via-scom
base_hwp_attribute_file
Work-in-progress for sc model, sync to current Cronus platinit support
Change-Id: I99a5313bfd4c760e4f4bea1a0b8b22e121db1c96
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28577
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28889
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'import')
-rw-r--r-- | import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml | 1 | ||||
-rw-r--r-- | import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml | 8 |
2 files changed, 7 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml index dc651aec..c3bd81b8 100644 --- a/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml +++ b/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml @@ -707,6 +707,7 @@ Not supposed to be writeable, PPE needs to resolve this issue in sberegaccess.C --> <writeable/> + <initToZero/> </attribute> <!-- ********************************************************************** --> <attribute> diff --git a/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml index 34357791..7330b468 100644 --- a/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml +++ b/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml @@ -28,7 +28,6 @@ <!-- Attributes are taken from model nest --> <!--nest_attributes.xml--> <attributes> - <attribute> <id>ATTR_SBE_BOOTLOADER_OFFSET</id> <targetType>TARGET_TYPE_SYSTEM</targetType> @@ -38,8 +37,8 @@ <valueType>uint64</valueType> <persistRuntime/> <platInit/> + <initToZero/> </attribute> - <attribute> <id>ATTR_HOSTBOOT_HRMOR_OFFSET</id> <targetType>TARGET_TYPE_SYSTEM</targetType> @@ -49,6 +48,7 @@ <valueType>uint64</valueType> <persistRuntime/> <platInit/> + <initToZero/> </attribute> <attribute> <id>ATTR_PNOR_SIZE</id> @@ -57,6 +57,7 @@ <valueType>uint16</valueType> <persistRuntime/> <platInit/> + <initToZero/> </attribute> <attribute> <id>ATTR_SBE_BOOT_SIDE</id> @@ -65,6 +66,7 @@ <valueType>uint8</valueType> <persistRuntime/> <platInit/> + <initToZero/> </attribute> <attribute> <id>ATTR_PNOR_BOOT_SIDE</id> @@ -73,6 +75,7 @@ <valueType>uint8</valueType> <persistRuntime/> <platInit/> + <initToZero/> </attribute> <attribute> <id>ATTR_SBE_HBBL_EXCEPTION_INSTRUCT</id> @@ -81,5 +84,6 @@ <valueType>uint32</valueType> <persistRuntime/> <platInit/> + <initToZero/> </attribute> </attributes> |