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| author | Richard J. Knight <rjknight@us.ibm.com> | 2016-07-26 14:28:54 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-08-03 00:19:59 -0400 |
| commit | 808195305e0d555d3534b54ff7e35566353769d4 (patch) | |
| tree | 9bcc95ada776c529530e7d7aab7a2db5f68c962f /import | |
| parent | d56039400f5a8add9f48e0fe9146e6480a04c7dd (diff) | |
| download | talos-sbe-808195305e0d555d3534b54ff7e35566353769d4.tar.gz talos-sbe-808195305e0d555d3534b54ff7e35566353769d4.zip | |
Add sbeError tag to all SBE related error xml files
Change-Id: I990940cad75b04131a25ddd1a0aac9dfc10ecf65
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27463
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Santosh S. Puranik <santosh.puranik@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27512
Diffstat (limited to 'import')
26 files changed, 107 insertions, 9 deletions
diff --git a/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml index f2374280..b0d72beb 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml @@ -7,7 +7,7 @@ <!-- --> <!-- EKB Project --> <!-- --> -<!-- COPYRIGHT 2015 --> +<!-- COPYRIGHT 2015,2016 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -19,6 +19,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_ADU_COHERENT_UTILS_INVALID_ARGS</rc> <description> Procedure: p9_adu_coherent_utils @@ -29,6 +30,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_ADU_COHERENT_UTILS_RESET_ERR</rc> <description> Procedure: p9_adu_coherent_utils @@ -38,6 +40,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_ADU_FBC_NOT_INITIALIZED_ERR</rc> <description> Procedure: p9_adu_coherent_utils @@ -49,6 +52,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc> RC_P9_ADU_STATUS_REG_ERR</rc> <description> Procedure: p9_adu_coherent_utils diff --git a/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml index dfc0e2fa..262434fc 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_block_wakeup_intr_errors.xml @@ -20,6 +20,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_BLOCK_WAKEUP_INTR_OP</rc> <description>Unknown operation passed to p9_block_wakeup_intr </description> @@ -27,6 +28,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_BLOCK_WAKEUP_INTR_CHECK_FAIL</rc> <description>Test of p9_block_wakeup_intr failed. Note: this is NOT a production error definition; used by test infrastructure. diff --git a/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml index 06da03fa..1759a1e2 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_common_poweronoff_errors.xml @@ -7,7 +7,7 @@ <!-- --> <!-- EKB Project --> <!-- --> -<!-- COPYRIGHT 2015 --> +<!-- COPYRIGHT 2015,2016 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -20,6 +20,7 @@ <hwpErrors> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_PFETLIB_BAD_DOMAIN</rc> <description>Invalid domain value passed to p9_pfet_control.</description> <ffdc>EX</ffdc> @@ -31,6 +32,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_PFETLIB_BAD_SCOM</rc> <description>SCOM request failed.</description> <ffdc>EX</ffdc> @@ -43,6 +45,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_PFETLIB_BAD_OP</rc> <description>Invalid operation value passed to p9_pfet_control.</description> <ffdc>EX</ffdc> @@ -55,6 +58,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_PFETLIB_RAIL_ON</rc> <description>Error returned turning PFETs on in p9_pfet_control.</description> <ffdc>EX</ffdc> @@ -63,6 +67,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_PFETLIB_RAIL_OFF</rc> <description>Error returned turning PFETs off in p9_pfet_control.</description> <ffdc>EX</ffdc> @@ -71,6 +76,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_PFETLIB_TIMEOUT</rc> <description> PFET sequencer timed out in p9_pfet_control. @@ -104,6 +110,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_PFET_CODE_BAD_MODE</rc> <description>Unknown mode passed to p9_pfet_init</description> <ffdc>EX</ffdc> @@ -115,6 +122,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_PFET_GET_ATTR</rc> <description>p9_pfet_init could not get an attribute.</description> <ffdc>EX</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml index e77f1af2..b5c3c459 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_dpll_setup_errors.xml @@ -20,6 +20,7 @@ <hwpErrors> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_DPLL_LOCK_TIMEOUT</rc> <description> DPLL is not locking. @@ -50,6 +51,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_DPLLCLKSTART_TIMEOUT</rc> <description> dpll clock start timed out. @@ -80,6 +82,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_DPLLCLKSTART_FAILED</rc> <description> dpll clock start failed. @@ -88,6 +91,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_ANEPCLKSTART_TIMEOUT</rc> <description> anep clock start timed out. diff --git a/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml index 4c5be204..e2336d42 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_startclocks_errors.xml @@ -20,6 +20,7 @@ <hwpErrors> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CACHECPLTALIGN_TIMEOUT</rc> <description> cache chiplets alignment timed out. @@ -28,6 +29,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CACHE_XSTOP</rc> <description> cache checkstops. @@ -36,6 +38,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CACHECLKSYNC_TIMEOUT</rc> <description> L2 EXs clock sync done timed out. @@ -44,6 +47,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CACHECLKSTART_FAILED</rc> <description> cache clock start failed. @@ -52,6 +56,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CACHECLKSTART_TIMEOUT</rc> <description> cache clock start timed out. diff --git a/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml index f16dc201..8b9ba566 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_hcd_core_startclocks_errors.xml @@ -20,6 +20,7 @@ <hwpErrors> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CORECPLTALIGN_TIMEOUT</rc> <description> core chiplets alignment timed out. @@ -28,6 +29,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_QUADCPLTALIGN_FAILED</rc> <description> quad chiplets alignment failed. @@ -36,6 +38,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CORECPLTALIGN_FAILED</rc> <description> core chiplets alignment failed. @@ -44,6 +47,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CORE_XSTOP</rc> <description> core checkstops. @@ -52,6 +56,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CORECLKSYNC_TIMEOUT</rc> <description> core clock sync done timed out. @@ -60,6 +65,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CORECLKSTART_FAILED</rc> <description> core clock start failed. @@ -68,6 +74,7 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PMPROC_CORECLKSTART_TIMEOUT</rc> <description> core clock start timed out. diff --git a/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml index b776a615..3e0d90c0 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_pba_errors.xml @@ -7,7 +7,7 @@ <!-- --> <!-- EKB Project --> <!-- --> -<!-- COPYRIGHT 2015 --> +<!-- COPYRIGHT 2015,2016 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -20,6 +20,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_PBA_COHERENT_UTILS_INVALID_ARGS</rc> <description> Procedure: p9_pba_coherent_utils @@ -30,6 +31,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_PBA_COHERENT_UTILS_RESET_ERR</rc> <description> Procedure: p9_pba_coherent_utils @@ -40,6 +42,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_PBA_STATUS_ERR</rc> <description> Procedure: p9_pba_coherent_utils @@ -54,6 +57,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_PBA_FBC_NOT_INITIALIZED_ERR</rc> <description> Procedure: p9_pba_coherent_utils diff --git a/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml index a3405af1..6ee6e0c8 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml @@ -23,22 +23,26 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SBE_SCAN0_DONE_POLL_THRESHOLD_ERR</rc> <description>Timeout waiting for scan0 to complete , loop count expired that polls for OPCG_DONE</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SBE_ARRAYINIT_POLL_THRESHOLD_ERR</rc> <description>Polling for OPCG_DONE for arrayInit reached threshold , count expired.</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SRAM_ABIST_DONE_BIT_ERR</rc> <description>SRAM abist done bit is not set</description> <ffdc>READ_ABIST_DONE</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_EDRAM_ABIST_DONE_BIT_ERR</rc> <description>EDRAM abist done bit is not set</description> <ffdc>READ_ABIST_DONE</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml index 70a9265f..97ece653 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml @@ -20,6 +20,7 @@ <hwpErrors> <!-- ******************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PM_OCB_PUT_NO_DATA_ERROR</rc> <description> No data passed for Put operation. @@ -27,6 +28,7 @@ </hwpError> <!-- ******************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PM_OCB_PUT_DATA_POLL_NOT_FULL_ERROR</rc> <description> Indicates that a timeout occured waiting for a push queue to be non-full diff --git a/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml index 20828b72..22e61436 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml @@ -7,7 +7,7 @@ <!-- --> <!-- EKB Project --> <!-- --> -<!-- COPYRIGHT 2015 --> +<!-- COPYRIGHT 2015,2016 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -20,6 +20,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_PM_OCBINIT_BAD_MODE</rc> <description>Unknown mode passed to p9_pm_ocb_init. </description> @@ -27,6 +28,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_PM_OCBINIT_BAD_Q_LENGTH_PARM</rc> <description>Bad Queue Length Passed to p9_pm_ocb_init. </description> diff --git a/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml index 2ad7d24a..03495750 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml @@ -20,6 +20,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SPR_NAME_MAP_INIT_ERR</rc> <description> SPR name map is not empty while try to initialize @@ -31,6 +32,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SPR_NAME_MAP_ACCESS_ERR</rc> <description> Illegal SPR name or read/write mode access @@ -43,6 +45,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_NOT_SETUP_ERR</rc> <description> RAM is not setup as active before doing ram or cleanup @@ -54,6 +57,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_THREAD_NOT_STOP_ERR</rc> <description> The thread to perform ramming is not stopped @@ -66,6 +70,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_THREAD_INACTIVE_ERR</rc> <description> The thread to perform ramming is not active @@ -78,6 +83,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_STATUS_IN_RECOVERY_ERR</rc> <description> Attempt to perform ramming during recovery @@ -89,6 +95,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_STATUS_EXCEPTION_ERR</rc> <description> Exception or interrupt happened during ramming @@ -100,6 +107,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_STATUS_POLL_THRESHOLD_ERR</rc> <description> Polling for ram done reached threshold @@ -111,6 +119,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_INVALID_REG_TYPE_ACCESS_ERR</rc> <description> Illegal reg type access diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml index f49eab64..ebb1609e 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml @@ -19,6 +19,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CHECK_MASTER_STOP15_PENDING</rc> <description> Procedure: p9_sbe_check_master_stop15 @@ -31,6 +32,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CHECK_MASTER_STOP15_INVALID_REQUEST_LEVEL</rc> <description> Procedure: p9_sbe_check_master_stop15 @@ -40,6 +42,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CHECK_MASTER_STOP15_INVALID_ACTUAL_LEVEL</rc> <description> Procedure: p9_sbe_check_master_stop15 @@ -49,6 +52,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CHECK_MASTER_STOP15_INVALID_STATE</rc> <description> Procedure: p9_sbe_check_master_stop15 diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml index 6ed12a0b..ed35a65b 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_init_errors.xml @@ -7,7 +7,7 @@ <!-- --> <!-- EKB Project --> <!-- --> -<!-- COPYRIGHT 2015 --> +<!-- COPYRIGHT 2015,2016 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -23,6 +23,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CHECKSTOP_ERR</rc> <description>Checkstop error after scan0</description> <ffdc>READ_CHECKSTOP</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml index 8f7d2dc3..083904dc 100755 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml @@ -20,6 +20,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_CHIPLET_PLL_INITF_INVALID_CHIPLET</rc> <description>Unsupported/unexpected pervasive chiplet instance</description> <ffdc>TARGET</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml index 8c439903..3d8feb77 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_setup_errors.xml @@ -7,7 +7,7 @@ <!-- --> <!-- EKB Project --> <!-- --> -<!-- COPYRIGHT 2015 --> +<!-- COPYRIGHT 2015,2016 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -23,6 +23,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_PLL_LOCK_ERR</rc> <description>PLL Lock Not set</description> <ffdc>PLL_READ</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml index 967c5496..f5412425 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml @@ -23,52 +23,61 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_ARY_ERR</rc> <description>ary_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_ARY</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_NSL_ERR</rc> <description>nsl_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_NSL</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SL_ERR</rc> <description>sl_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_SL</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CPLT_NOT_ALIGNED_ERR</rc> <description>Chiplet not aligned</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CPLT_OPCG_DONE_NOT_SET_ERR</rc> <description>Chiplet OPCG_DONE not set after clock start/stop command</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_NEST_ARY_ERR</rc> <description>ary_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_ARY</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_NEST_NSL_ERR</rc> <description>nsl_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_NSL</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_NEST_SL_ERR</rc> <description>sl_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_SL</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_READ_ALL_CHECKSTOP_ERR</rc> <description>Read and or all Checkstop error</description> <ffdc>READ_ALL_CHECKSTOP</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml index 628dda3c..9428c737 100755 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_fabricinit_errors.xml @@ -7,7 +7,7 @@ <!-- --> <!-- EKB Project --> <!-- --> -<!-- COPYRIGHT 2015 --> +<!-- COPYRIGHT 2015,2016 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -20,6 +20,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_FABRICINIT_FBC_STOPPED_ERR</rc> <description> Procedure: p9_sbe_fabricinit @@ -30,6 +31,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_FABRICINIT_FAILED_ERR</rc> <description> Procedure: p9_sbe_fabricinit @@ -41,6 +43,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_FABRICINIT_NO_INIT_ERR</rc> <description> Procedure: p9_sbe_fabricinit diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml index 97d268a2..96f089b3 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_gear_switcher_errors.xml @@ -7,7 +7,7 @@ <!-- --> <!-- EKB Project --> <!-- --> -<!-- COPYRIGHT 2015 --> +<!-- COPYRIGHT 2015,2016 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -23,6 +23,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_BUS_STATUS_BUSY_0</rc> <description>Status busy check</description> </hwpError> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml index b5c65d77..ac6cadce 100755 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml @@ -21,6 +21,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_LOAD_BOOTLOADER_INVALID_TARGET_ADDRESS</rc> <description> Procedure: p9_sbe_load_bootloader @@ -34,6 +35,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_LOAD_BOOTLOADER_INVALID_PAYLOAD_SIZE</rc> <description> Procedure: p9_sbe_load_bootloader @@ -45,6 +47,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_MASTER_CORE_NOT_FOUND</rc> <description> Procedure: p9_sbe_load_bootloader diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml index 35beb9bb..8b2b05ec 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_mcs_setup_errors.xml @@ -7,7 +7,7 @@ <!-- --> <!-- EKB Project --> <!-- --> -<!-- COPYRIGHT 2015 --> +<!-- COPYRIGHT 2015,2016 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -19,6 +19,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_MCS_SETUP_NO_MC_FOUND_ERR</rc> <description>There is no functional MC chiplet (MCS/MI) present on the master chip</description> <ffdc>CHIP</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml index 28012297..1d670a58 100755 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml @@ -20,6 +20,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_NPLL_INITF_UNSUPPORTED_BUCKET</rc> <description>Unsupported Nest PLL bucket value</description> <ffdc>TARGET</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml index 028675eb..4461e21e 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml @@ -23,24 +23,28 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SS_PLL_LOCK_ERR</rc> <description>Spectrum pll not locked</description> <ffdc>SS_PLL_READ</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CP_FILTER_PLL_LOCK_ERR</rc> <description>CP Filter PLL not locked</description> <ffdc>CP_FILTER_PLL_READ</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_NEST_PLL_ERR</rc> <description>Nest PLL not locked</description> <ffdc>NEST_PLL_READ</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_IO_FILTER_PLL_LOCK_ERR</rc> <description>IO Filter PLL not locked</description> <ffdc>IO_FILTER_PLL_READ</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml index 3765d49f..535b3ef8 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml @@ -23,16 +23,19 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SBE_SELECT_EX_NO_CORES</rc> <description>No good cores were found in the Partial Good attribures</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SBE_SELECT_EX_NO_EQS</rc> <description>No good cache chiplets were found in the Partial Good attribures</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SBE_SELECT_EX_CORE_EQ_CONFIG_ERROR</rc> <description>Did not find the matching EQ for the first core</description> <ffdc>CORE_NUM</ffdc> @@ -40,6 +43,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SBE_SELECT_EX_NO_CORE_AVAIL_ERROR</rc> <description>No cores are configurable with current partial good and gard settings</description> </hwpError> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml index 4cb8d32a..a03b1dc1 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_chiplet_init3_errors.xml @@ -23,23 +23,27 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_XSTOP_ERR</rc> <description>Checkstop bit set in interrupt type reg</description> <ffdc>READ_XSTOP</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CALIBRATION_NOT_DONE</rc> <description>Precision Reference Voltage : Calibration not done</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_MF_OSC_ERR</rc> <description>MF Oscillator error active</description> <ffdc>READ_OSCERR_HOLD</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_MF_OSC_NOT_TOGGLE</rc> <description>MF Oscillator not toggling</description> <ffdc>READ_SNS1LTH</ffdc> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml index df226679..dfb20587 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_tp_switch_gears_errors.xml @@ -23,11 +23,13 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_BUS_STATUS_BUSY0</rc> <description>Status busy check</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_MAGIC_NUMBER_NOT_VALID</rc> <description>Magic number not matching</description> </hwpError> diff --git a/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml index af4d8c25..ec88aad7 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml @@ -21,6 +21,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_SRESET_PRE_FAIL</rc> <description>SReset command precondition not met: Not all threads are running.</description> <ffdc>CORE_TARGET</ffdc> @@ -33,6 +34,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_SRESET_FAIL</rc> <ffdc>CORE_TARGET</ffdc> <ffdc>THREAD</ffdc> @@ -55,6 +57,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_START_PRE_NOMAINT</rc> <description>Start command precondition not met: RAS STAT Maintenance bit is not set.</description> <ffdc>CORE_TARGET</ffdc> @@ -67,6 +70,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_START_FAIL</rc> <description>Start command failed: RAS STAT instruction completed bit was not set after start command.</description> <ffdc>CORE_TARGET</ffdc> @@ -79,6 +83,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_STOP_PRE_NOTRUNNING</rc> <description>Stop command precondition not met: Not all threads are running.</description> <ffdc>CORE_TARGET</ffdc> @@ -91,6 +96,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_STOP_FAIL</rc> <description>Stop command issued to core PC, but RAS STAT maintenance bit is not set.</description> <ffdc>CORE_TARGET</ffdc> @@ -103,6 +109,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_STEP_PRE_NOTSTOPPING</rc> <description>Step command precondition not met: Not all threads are stopped.</description> <ffdc>CORE_TARGET</ffdc> @@ -115,6 +122,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_STEP_FAIL</rc> <description>Step command issued to core PC, but RAS STAT run bit is still set.</description> <ffdc>CORE_TARGET</ffdc> |
