scan HWP updates

  tested via Cronus platform putring implementation

  p9_sbe_attr_setup
  p9_setup_sbe_config
    adjust mailbox write/read logic to properly handle cache contained mode

  p9_sbe_gptr_time_initf
    remove unused MC mc_iom[01|23]_time rings
    add OBUS1/2 scans
    add PCI pci[0|1|2]_pll_gptr rings
    add N2 n2_psi_gptr ring

  p9_sbe_repr_initf
    remove unused MC mc_iom[01|23]_repr rings
    add OBUS1/2 scans

  p9_sbe_nest_initf
    skip MC iom[01|23]_fure scans which require DETERMINISTIC_TEST_EN

  p9_sbe_io_initf
    skip PCI pci[0|1|2]_fure scans which require DETERMINISTIC_TEST_EN
    remove DETERMINISTIC_TEST_EN application for XB

  p9_hcd_cache_initf
    remove explicit initfile invocation/ring caching in wrapper
    correct putring targeting
    add EX ex_l2_mode ring scan

  p9_hcd_core_initf
    remove explicit initfile invocation/ring caching in wrapper
    add EC ec_mode ring scan

  add DBG/ERR trace for all putRing calls
  remove unused *gptr_time_repr_initf HWPs and wrappers

Change-Id: If99a6b165f823dcb33d8586dff0a2195965f1ad0
Original-Change-Id: If1f8e9f5b327a6ab4f9b5271c53616ad20163b93
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27400
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27806
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

7 files changed, 380 insertions, 200 deletions

diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
index 77188188..8d16aa06 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
@@ -52,42 +52,42 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_initf(const
         switch (l_unit_pos)
         {
             case 0x6:
-                FAPI_DBG("Scan XBUS chiplet ring");
+                FAPI_DBG("Scan xb_pll_bndy_ring");
                 l_ring_id = xb_pll_bndy;
                 break;
 
             case 0x9:
-                FAPI_DBG("Scan OB0 chiplet ring");
+                FAPI_DBG("Scan ob0_pll_bndy ring");
                 l_ring_id = ob0_pll_bndy;
                 break;
 
             case 0xa:
-                FAPI_DBG("Scan OB1 chiplet ring");
+                FAPI_DBG("Scan ob1_pll_bndy ring");
                 l_ring_id = ob1_pll_bndy;
                 break;
 
             case 0xb:
-                FAPI_DBG("Scan OB2 chiplet ring");
+                FAPI_DBG("Scan ob2_pll_bndy ring");
                 l_ring_id = ob2_pll_bndy;
                 break;
 
             case 0xc:
-                FAPI_DBG("Scan OB3 chiplet ring");
+                FAPI_DBG("Scan ob3_pll_bndy ring");
                 l_ring_id = ob3_pll_bndy;
                 break;
 
             case 0xd:
-                FAPI_DBG("Scan PCI0 chiplet ring");
+                FAPI_DBG("Scan pci0_pll_bndy ring");
                 l_ring_id = pci0_pll_bndy;
                 break;
 
             case 0xe:
-                FAPI_DBG("Scan PCI1 chiplet ring");
+                FAPI_DBG("Scan pci1_pll_bndy ring");
                 l_ring_id = pci1_pll_bndy;
                 break;
 
             case 0xf:
-                FAPI_DBG("Scan PCI2 chiplet ring");
+                FAPI_DBG("Scan pci2_pll_bndy ring");
                 l_ring_id = pci2_pll_bndy;
                 break;
 
@@ -99,14 +99,16 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_initf(const
                             "Unexpected chiplet!");
         }
 
-        FAPI_TRY(fapi2::putRing(i_target_chip, l_ring_id, fapi2::RING_MODE_SET_PULSE_NSL));
+        FAPI_TRY(fapi2::putRing(i_target_chip, l_ring_id, fapi2::RING_MODE_SET_PULSE_NSL),
+                 "Error from putRing (ringID: %d)", l_ring_id);
 
     }
 
     for (auto l_chplt_trgt :  i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL))
     {
-        FAPI_DBG("Scan initialize MC chiplet ring");
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_pll_bndy_bucket_1, fapi2::RING_MODE_SET_PULSE_NSL));
+        FAPI_DBG("Scan mc_pll_bndy_bucket_1 ring");
+        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_pll_bndy_bucket_1, fapi2::RING_MODE_SET_PULSE_NSL),
+                 "Error from putRing (mc_pll_bndy)");
     }
 
 fapi_try_exit:
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
index 9ab853a2..cffca0b4 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
@@ -33,6 +33,7 @@
 
 #include "p9_perv_scom_addresses.H"
 
+
 fapi2::ReturnCode p9_sbe_gptr_time_initf(const
         fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
 {
@@ -43,15 +44,21 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
     for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>
          (fapi2::TARGET_STATE_FUNCTIONAL))
     {
-
-        FAPI_DBG("Scan gptr rings for MC chiplets ");
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_gptr));
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_gptr));
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_gptr));
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_pll_gptr));
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_time));
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_time));
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_time));
+        FAPI_DBG("Scan mc_gptr ring");
+        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_gptr),
+                 "Error from putRing (mc_gptr)");
+        FAPI_DBG("Scan mc_iom01_gptr ring");
+        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_gptr),
+                 "Error from putRing (mc_iom01_gptr)");
+        FAPI_DBG("Scan mc_iom23_gptr ring");
+        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_gptr),
+                 "Error from putRing (mc_iom23_gptr)");
+        FAPI_DBG("Scan mc_pll_gptr ring");
+        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_pll_gptr),
+                 "Error from putRing (mc_pll_gptr)");
+        FAPI_DBG("Scan mc_time ring");
+        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_time),
+                 "Error from putRing (mc_time)");
     }
 
     for( auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
@@ -59,108 +66,216 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
     {
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos));
 
-        if ((l_attr_chip_unit_pos == 0x09))/* OBUS0 Chiplet */
+        if ((l_attr_chip_unit_pos == 0x9))/* OBUS0 Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for obus0 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_pll_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_time));
+            FAPI_DBG("Scan ob0_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_gptr),
+                     "Error from putRing (ob0_gptr)");
+            FAPI_DBG("Scan ob0_pll_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_pll_gptr),
+                     "Error from putRing (ob0_pll_gptr)");
+            FAPI_DBG("Scan ob0_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_time),
+                     "Error from putRing (ob0_time)");
+        }
 
+        if ((l_attr_chip_unit_pos == 0xA))/* OBUS1 Chiplet */
+        {
+            FAPI_DBG("Scan ob1_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob1_gptr),
+                     "Error from putRing (ob1_gptr)");
+            FAPI_DBG("Scan ob1_pll_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob1_pll_gptr),
+                     "Error from putRing (ob1_pll_gptr)");
+            FAPI_DBG("Scan ob1_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob1_time),
+                     "Error from putRing (ob1_time)");
+        }
+
+        if ((l_attr_chip_unit_pos == 0xB))/* OBUS2 Chiplet */
+        {
+            FAPI_DBG("Scan ob2_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob2_gptr),
+                     "Error from putRing (ob2_gptr)");
+            FAPI_DBG("Scan ob2_pll_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob2_pll_gptr),
+                     "Error from putRing (ob2_pll_gptr)");
+            FAPI_DBG("Scan ob2_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob2_time),
+                     "Error from putRing (ob2_time)");
         }
 
-        //Rings need to be scanned for OBUS 2 and 3 incase of Cumulus
         if ((l_attr_chip_unit_pos == 0xC))/* OBUS3 Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for obus3 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_pll_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_time));
+            FAPI_DBG("Scan ob3_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_gptr),
+                     "Error from putRing (ob3_gptr)");
+            FAPI_DBG("Scan ob3_pll_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_pll_gptr),
+                     "Error from putRing (ob3_pll_gptr)");
+            FAPI_DBG("Scan ob3_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_time),
+                     "Error from putRing (ob3_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x06))/* XBUS Chiplet */
+        if ((l_attr_chip_unit_pos == 0x6))/* XBUS Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for xbus chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io0_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_pll_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io0_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_time));
+            FAPI_DBG("Scan xb_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_gptr),
+                     "Error from putRing (xb_gptr)");
+            FAPI_DBG("Scan xb_io1_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_gptr),
+                     "Error from putRing (xb_io1_gptr)");
+            FAPI_DBG("Scan xb_io2_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_gptr),
+                     "Error from putRing (xb_io2_gptr)");
+            FAPI_DBG("Scan xb_pll_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_pll_gptr),
+                     "Error from putRing (xb_pll_gptr)");
+            FAPI_DBG("Scan xb_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_time),
+                     "Error from putRing (xb_time)");
+            FAPI_DBG("Scan xb_io1_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_time),
+                     "Error from putRing (xb_io1_time)");
+            FAPI_DBG("Scan xb_io2_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_time),
+                     "Error from putRing (xb_io2_time)");
         }
 
         if ((l_attr_chip_unit_pos == 0xD))/* PCI0 Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for pci0 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci0_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci0_time));
+            FAPI_DBG("Scan pci0_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci0_gptr),
+                     "Error from putRing (pci0_gptr)");
+            FAPI_DBG("Scan pci0_pll_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci0_pll_gptr),
+                     "Error from putRing (pci0_pll_gptr)");
+            FAPI_DBG("Scan pci0_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci0_time),
+                     "Error from putRing (pci0_time)");
         }
 
         if ((l_attr_chip_unit_pos == 0xE))/* PCI1 Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for pci1 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci1_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci1_time));
+            FAPI_DBG("Scan pci1_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci1_gptr),
+                     "Error from putRing (pci1_gptr)");
+            FAPI_DBG("Scan pci1_pll_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci1_pll_gptr),
+                     "Error from putRing (pci1_pll_gptr)");
+            FAPI_DBG("Scan pci1_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci1_time),
+                     "Error from putRing (pci1_time)");
         }
 
         if ((l_attr_chip_unit_pos == 0xF))/* PCI2 Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for pci2 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci2_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci2_time));
+            FAPI_DBG("Scan pci2_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci2_gptr),
+                     "Error from putRing (pci2_gptr)");
+            FAPI_DBG("Scan pci2_pll_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci2_pll_gptr),
+                     "Error from putRing (pci2_pll_gptr)");
+            FAPI_DBG("Scan pci2_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci2_time),
+                     "Error from putRing (pci2_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x02))/* N0 Chiplet */
+        if ((l_attr_chip_unit_pos == 0x2))/* N0 Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for n0 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_time));
+            FAPI_DBG("Scan n0_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n0_gptr),
+                     "Error from putRing (n0_gptr)");
+            FAPI_DBG("Scan n0_nx_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_gptr),
+                     "Error from putRing (n0_nx_gptr)");
+            FAPI_DBG("Scan n0_cxa0_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_gptr),
+                     "Error from putRing (n0_cxa0_gptr)");
+            FAPI_DBG("Scan n0_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n0_time),
+                     "Error from putRing (n0_time)");
+            FAPI_DBG("Scan n0_nx_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_time),
+                     "Error from putRing (n0_nx_time)");
+            FAPI_DBG("Scan n0_cxa0_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_time),
+                     "Error from putRing (n0_cxa0_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x03))/* N1 Chiplet */
+        if ((l_attr_chip_unit_pos == 0x3))/* N1 Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for n1 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_time));
+            FAPI_DBG("Scan n1_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_gptr),
+                     "Error from putRing (n1_gptr)");
+            FAPI_DBG("Scan n1_ioo0_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_gptr),
+                     "Error from putRing (n1_ioo0_gptr)");
+            FAPI_DBG("Scan n1_ioo1_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_gptr),
+                     "Error from putRing (n1_ioo1_gptr)");
+            FAPI_DBG("Scan n1_mcs23_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_gptr),
+                     "Error from putRing (n1_mcs23_gptr)");
+            FAPI_DBG("Scan n1_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_time),
+                     "Error from putRing (n1_time)");
+            FAPI_DBG("Scan n1_ioo0_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_time),
+                     "Error from putRing (n1_ioo0_time)");
+            FAPI_DBG("Scan n1_ioo1_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_time),
+                     "Error from putRing (n1_ioo1_time)");
+            FAPI_DBG("Scan n1_mcs23_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_time),
+                     "Error from putRing (n1_mcs23_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x04))/* N2 Chiplet */
+        if ((l_attr_chip_unit_pos == 0x4))/* N2 Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for n2 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_time));
+            FAPI_DBG("Scan n2_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n2_gptr),
+                     "Error from putRing (n2_gptr)");
+            FAPI_DBG("Scan n2_psi_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n2_psi_gptr),
+                     "Error from putRing (n2_psi_gptr)");
+            FAPI_DBG("Scan n2_cxa1_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_gptr),
+                     "Error from putRing (n2_cxa1_gptr)");
+            FAPI_DBG("Scan n2_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n2_time),
+                     "Error from putRing (n2_time)");
+            FAPI_DBG("Scan n2_cxa1_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_time),
+                     "Error from putRing (n2_cxa1_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x05))/* N3 Chiplet */
+        if ((l_attr_chip_unit_pos == 0x5))/* N3 Chiplet */
         {
-            FAPI_DBG("Scan gptr rings for n3 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_gptr ));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_gptr ));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_gptr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_time));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_time));
+            FAPI_DBG("Scan n3_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n3_gptr),
+                     "Error from putRing (n3_gptr)");
+            FAPI_DBG("Scan n3_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n3_time),
+                     "Error from putRing (n3_time)");
+            FAPI_DBG("Scan n3_np_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_gptr),
+                     "Error from putRing (n3_np_gptr)");
+            FAPI_DBG("Scan n3_mcs01_gptr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_gptr),
+                     "Error from putRing (n3_mcs01_gptr)");
+            FAPI_DBG("Scan n3_mcs01_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_time),
+                     "Error from putRing (n3_mcs01_time)");
+            FAPI_DBG("Scan n3_np_time ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_time),
+                     "Error from putRing (n3_np_time)");
         }
-
     }
 
-    FAPI_INF("Exiting ...");
-
 fapi_try_exit:
+    FAPI_INF("Exiting ...");
     return fapi2::current_err;
 
 }
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
index 04eaa92c..50167b78 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
@@ -38,76 +38,91 @@
 fapi2::ReturnCode p9_sbe_io_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
 {
     FAPI_INF("Entering ...");
-    uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-    fapi2::buffer<uint64_t> l_data64;
-    l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_DETERMINISTIC_TEST_ENABLE_DC>();
+    uint8_t l_attr_chip_unit_pos = 0;
 
-    for( auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
-         ( fapi2::TARGET_STATE_FUNCTIONAL))
+    for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL))
     {
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos));
 
-        if ((l_attr_chip_unit_pos == 0xD))/* PCI0 Chiplet */
+#if 0
         {
-            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_CPLT_CTRL0_OR, l_data64));
-            FAPI_DBG("Scan fure rings for PCI0 chiplets ");
-            // FAPI_TRY(fapi2::putRing(i_target_chip, pci0_fure));
-            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_CPLT_CTRL0_CLEAR, l_data64));
-        }
+            // PCIx FURE rings require deterministic scan enable
+            // no current plan to scan these during mainline IPL, but recipe is below if needed
+            fapi2::buffer<uint64_t> l_data64;
+            l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_DETERMINISTIC_TEST_ENABLE_DC>();
 
-        if ((l_attr_chip_unit_pos == 0xE))/* PCI1 Chiplet */
-        {
-            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_CPLT_CTRL0_OR, l_data64));
-            FAPI_DBG("Scan fure rings for PCI1 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci1_fure));
-            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_CPLT_CTRL0_CLEAR, l_data64));
-        }
+            if (l_attr_chip_unit_pos == 0xD)/* PCI0 Chiplet */
+            {
+                FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI0_CPLT_CTRL0_OR, l_data64));
+                FAPI_DBG("Scan pci0_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, pci0_fure),
+                         "Error from putRing (pci0_fure)");
+                FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI0_CPLT_CTRL0_CLEAR, l_data64));
+            }
 
-        if ((l_attr_chip_unit_pos == 0xF))/* PCI2 Chiplet */
-        {
-            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_CPLT_CTRL0_OR, l_data64));
-            FAPI_DBG("Scan fure rings for PCI2 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci2_fure));
-            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_CPLT_CTRL0_CLEAR, l_data64));
+            if (l_attr_chip_unit_pos == 0xE)/* PCI1 Chiplet */
+            {
+                FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI1_CPLT_CTRL0_OR, l_data64));
+                FAPI_DBG("Scan pci1_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, pci1_fure),
+                         "Error from putRing (pci1_fure)");
+                FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI1_CPLT_CTRL0_CLEAR, l_data64));
+            }
+
+            if (l_attr_chip_unit_pos == 0xF)/* PCI2 Chiplet */
+            {
+                FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI2_CPLT_CTRL0_OR, l_data64));
+                FAPI_DBG("Scan pci2_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, pci2_fure),
+                         "Error from putRing (pci2_fure)");
+                FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI2_CPLT_CTRL0_CLEAR, l_data64));
+            }
         }
+#endif
 
-        if ((l_attr_chip_unit_pos == 0x9))/* OBUS0 Chiplet */
+        if (l_attr_chip_unit_pos == 0x9)/* OBUS0 Chiplet */
         {
-            FAPI_DBG("Scan fure rings for OBUS0 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_fure));
+            FAPI_DBG("Scan ob0_fure ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_fure),
+                     "Error from putRing (ob0_fure)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xA))/* OBUS1 Chiplet */
+        if (l_attr_chip_unit_pos == 0xA)/* OBUS1 Chiplet */
         {
-            FAPI_DBG("Scan fure rings for OBUS1 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob1_fure));
+            FAPI_DBG("Scan ob1_fure ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob1_fure),
+                     "Error from putRing (ob1_fure)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xB))/* OBUS2 Chiplet */
+        if (l_attr_chip_unit_pos == 0xB)/* OBUS2 Chiplet */
         {
-            FAPI_DBG("Scan fure rings for OBUS2 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob2_fure));
+            FAPI_DBG("Scan ob2_fure ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob2_fure),
+                     "Error from putRing (ob2_fure)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xC))/* OBUS3 Chiplet */
+        if (l_attr_chip_unit_pos == 0xC)/* OBUS3 Chiplet */
         {
-            FAPI_DBG("Scan fure rings for OBUS3 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_fure));
+            FAPI_DBG("Scan ob3_fure ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_fure),
+                     "Error from putRing (ob3_fure)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x6))/* XBUS Chiplet */
+        if (l_attr_chip_unit_pos == 0x6)/* XBUS Chiplet */
         {
-            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_CPLT_CTRL0_OR, l_data64));
-            FAPI_DBG("Scan fure rings for XBUS chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_fure));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_fure));
-            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_CPLT_CTRL0_CLEAR, l_data64));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_fure));
+            FAPI_DBG("Scan xb_io1_fure ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_fure),
+                     "Error from putRing (xb_io1_fure)");
+            FAPI_DBG("Scan xb_io2_fure ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_fure),
+                     "Error from putRing (xb_io2_fure)");
+            FAPI_DBG("Scan xb_fure ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_fure),
+                     "Error from putRing (xb_fure)");
         }
     }
 
-    FAPI_INF("Exiting ...");
-
 fapi_try_exit:
+    FAPI_INF("Exiting ...");
     return fapi2::current_err;
 }
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
index 2a8399c3..2a740225 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
@@ -75,7 +75,9 @@ fapi2::ReturnCode p9_sbe_npll_initf(const
                         "Unsupported Nest PLL bucket value!");
     }
 
-    FAPI_TRY(fapi2::putRing(i_target_chip, ringID, fapi2::RING_MODE_SET_PULSE_NSL));
+    FAPI_DBG("Scan perv_pll_bndy_bucket_%d ring", l_read_attr);
+    FAPI_TRY(fapi2::putRing(i_target_chip, ringID, fapi2::RING_MODE_SET_PULSE_NSL),
+             "Error from putRing (perv_pll_bndy, ringID: %d)", ringID);
 
 fapi_try_exit:
     FAPI_INF("Exiting ...");
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
index 178151db..0310f305 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
@@ -30,106 +30,141 @@
 //------------------------------------------------------------------------------
 
 #include "p9_sbe_repr_initf.H"
-
 #include "p9_perv_scom_addresses.H"
 
+
 fapi2::ReturnCode p9_sbe_repr_initf(const
                                     fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
 {
-    uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET belo
-
+    uint8_t l_attr_chip_unit_pos = 0;
     FAPI_INF("Entering ...");
 
-    for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>
-         (fapi2::TARGET_STATE_FUNCTIONAL))
+    for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL))
     {
-        FAPI_DBG("Scan repr rings for mc chiplets ");
         FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_repr));
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_repr));
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_repr));
     }
 
-    for( auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
-         ( fapi2::TARGET_STATE_FUNCTIONAL))
+    for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL))
     {
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos));
 
-        if ((l_attr_chip_unit_pos == 0x09))/* OBUS0 Chiplet */
+        if (l_attr_chip_unit_pos == 0x9)/* OBUS0 Chiplet */
         {
-            FAPI_DBG("Scan repr rings for obus chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_repr));
+            FAPI_DBG("Scan ob0_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob0_repr),
+                     "Error from putRing (ob0_repr)");
         }
 
-        //Rings need to be scanned for OBUS 2 and 3 incase of Cumulus
-        if ((l_attr_chip_unit_pos == 0xC))/* OBUS3 Chiplet */
+        if (l_attr_chip_unit_pos == 0xA)/* OBUS1 Chiplet */
         {
-            FAPI_DBG("Scan repr rings for obus chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_repr));
+            FAPI_DBG("Scan ob1_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob1_repr),
+                     "Error from putRing (ob1_repr)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x06))/* XBUS Chiplet */
+        if (l_attr_chip_unit_pos == 0xB)/* OBUS2 Chiplet */
         {
-            FAPI_DBG("Scan repr rings for xbus chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io0_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_repr));
+            FAPI_DBG("Scan ob2_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob2_repr),
+                     "Error from putRing (ob2_repr)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xD))/* PCI0 Chiplet */
+        if (l_attr_chip_unit_pos == 0xC)/* OBUS3 Chiplet */
         {
-            FAPI_DBG("Scan repr rings for pci0 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci0_repr));
+            FAPI_DBG("Scan ob3_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, ob3_repr),
+                     "Error from putRing (ob3_repr)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xE))/* PCI1 Chiplet */
+        if (l_attr_chip_unit_pos == 0x6)/* XBUS Chiplet */
         {
-            FAPI_DBG("Scan repr rings for pci1 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci1_repr));
+            FAPI_DBG("Scan xb_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_repr),
+                     "Error from putRing (xb_repr)");
+            FAPI_DBG("Scan xb_io1_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_repr),
+                     "Error from putRing (xb_io1_repr)");
+            FAPI_DBG("Scan xb_io2_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_repr),
+                     "Error from putRing (xb_io2_repr)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xF))/* PCI2 Chiplet */
+        if (l_attr_chip_unit_pos == 0xD)/* PCI0 Chiplet */
         {
-            FAPI_DBG("Scan repr rings for pci2 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, pci2_repr));
+            FAPI_DBG("Scan pci0_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci0_repr),
+                     "Error from putRing (pci0_repr)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x02))/* N0 Chiplet */
+        if (l_attr_chip_unit_pos == 0xE)/* PCI1 Chiplet */
         {
-            FAPI_DBG("Scan repr rings for n0 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_repr));
+            FAPI_DBG("Scan pci1_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci1_repr),
+                     "Error from putRing (pci1_repr)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x03))/* N1 Chiplet */
+        if (l_attr_chip_unit_pos == 0xF)/* PCI2 Chiplet */
         {
-            FAPI_DBG("Scan repr rings for n1 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_repr));
+            FAPI_DBG("Scan pci2_repr_ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, pci2_repr),
+                     "Error from putRing (pci2_repr)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x04))/* N2 Chiplet */
+        if (l_attr_chip_unit_pos == 0x2)/* N0 Chiplet */
         {
-            FAPI_DBG("Scan repr rings for n2 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_repr));
+            FAPI_DBG("Scan n0_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n0_repr),
+                     "Error from putRing (n0_repr)");
+            FAPI_DBG("Scan n0_nx_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_repr),
+                     "Error from putRing (n0_nx_repr)");
+            FAPI_DBG("Scan n0_cxa0_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_repr),
+                     "Error from putRing (n0_cxa0_repr)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x05))/* N3 Chiplet */
+        if (l_attr_chip_unit_pos == 0x3)/* N1 Chiplet */
         {
-            FAPI_DBG("Scan repr rings for n3 chiplets ");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_repr));
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_repr));
+            FAPI_DBG("Scan n1_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_repr),
+                     "Error from putRing (n1_repr)");
+            FAPI_DBG("Scan n1_ioo0_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_repr),
+                     "Error from putRing (n1_ioo0_repr)");
+            FAPI_DBG("Scan n1_ioo1_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_repr),
+                     "Error from putRing (n1_ioo1_repr)");
+            FAPI_DBG("Scan n1_mcs23_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_repr),
+                     "Error from putRing (n1_mcs23_repr)");
         }
-    }
 
-    FAPI_INF("Exiting ...");
+        if (l_attr_chip_unit_pos == 0x4)/* N2 Chiplet */
+        {
+            FAPI_DBG("Scan n2_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n2_repr),
+                     "Error from putRing (n2_repr)");
+            FAPI_DBG("Scan n2_cxa1_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_repr),
+                     "Error from putRing (n2_cxa1_repr)");
+        }
+
+        if (l_attr_chip_unit_pos == 0x5)/* N3 Chiplet */
+        {
+            FAPI_DBG("Scan n3_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n3_repr),
+                     "Error from putRing (n3_repr)");
+            FAPI_DBG("Scan n3_mcs01_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_repr),
+                     "Error from putRing (n3_mcs01_repr)");
+            FAPI_DBG("Scan n3_np_repr ring");
+            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_repr),
+                     "Error from putRing (n3_np_repr)");
+        }
+    }
 
 fapi_try_exit:
+    FAPI_INF("Exiting ...");
     return fapi2::current_err;
 
 }
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C
index 5509f8a4..0820dd4d 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C
@@ -38,16 +38,26 @@ fapi2::ReturnCode p9_sbe_tp_gptr_time_initf(const
 {
     FAPI_INF("Entering ...");
 
-    FAPI_DBG("Scan gptr and time rings for tp chiplet");
-    FAPI_TRY(fapi2::putRing(i_target_chip, perv_gptr));
-    FAPI_TRY(fapi2::putRing(i_target_chip, perv_ana_gptr));
-    FAPI_TRY(fapi2::putRing(i_target_chip, perv_pll_gptr));
-    FAPI_TRY(fapi2::putRing(i_target_chip, occ_gptr));
-    FAPI_TRY(fapi2::putRing(i_target_chip, occ_time));
-    FAPI_TRY(fapi2::putRing(i_target_chip, perv_time));
-
-    FAPI_INF("Exiting ...");
+    FAPI_DBG("Scan perv_gptr ring");
+    FAPI_TRY(fapi2::putRing(i_target_chip, perv_gptr),
+             "Error from putRing (perv_gptr)");
+    FAPI_DBG("Scan perv_ana_gptr ring");
+    FAPI_TRY(fapi2::putRing(i_target_chip, perv_ana_gptr),
+             "Error from putRing (perv_ana_gptr)");
+    FAPI_DBG("Scan perv_pll_gptr ring");
+    FAPI_TRY(fapi2::putRing(i_target_chip, perv_pll_gptr),
+             "Error from putRing (perv_pll_gptr)");
+    FAPI_DBG("Scan occ_gptr ring");
+    FAPI_TRY(fapi2::putRing(i_target_chip, occ_gptr),
+             "Error from putRing (occ_gptr)");
+    FAPI_DBG("Scan occ_time ring");
+    FAPI_TRY(fapi2::putRing(i_target_chip, occ_time),
+             "Error from putRing (occ_time)");
+    FAPI_DBG("Scan perv_time ring");
+    FAPI_TRY(fapi2::putRing(i_target_chip, perv_time),
+             "Error from putRing (perv_time)");
 
 fapi_try_exit:
+    FAPI_INF("Exiting ...");
     return fapi2::current_err;
 }
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C
index e2c1777e..1876b6e2 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C
@@ -38,14 +38,15 @@ fapi2::ReturnCode p9_sbe_tp_repr_initf(const
 {
     FAPI_INF("Entering ...");
 
-    FAPI_DBG("Scan perv repr ring.");
-    FAPI_TRY(fapi2::putRing(i_target_chip, perv_repr));
+    FAPI_DBG("Scan perv_repr ring");
+    FAPI_TRY(fapi2::putRing(i_target_chip, perv_repr),
+             "Error from putRing (perv_repr)");
 
-    FAPI_DBG("Scan occ repr ring.");
-    FAPI_TRY(fapi2::putRing(i_target_chip, occ_repr));
-
-    FAPI_INF("Exiting ...");
+    FAPI_DBG("Scan occ_repr ring");
+    FAPI_TRY(fapi2::putRing(i_target_chip, occ_repr),
+             "Error from putRing (occ_repr)");
 
 fapi_try_exit:
+    FAPI_INF("Exiting ...");
     return fapi2::current_err;
 }