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| author | Stephen Cprek <smcprek@us.ibm.com> | 2015-01-30 12:06:21 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-02-12 08:29:54 -0600 |
| commit | d84a1393ddec82dda67207a6f21edb5153877b5a (patch) | |
| tree | 98c340c57bd32ef10417eeb8a25059ac8df319a9 /LAYOUT | |
| parent | b70c8b16f7d8077f5b46a086295ccfeaaded3ddd (diff) | |
| download | talos-sbe-d84a1393ddec82dda67207a6f21edb5153877b5a.tar.gz talos-sbe-d84a1393ddec82dda67207a6f21edb5153877b5a.zip | |
Add directory structure
Change-Id: I9d2fdc9757d060cc07ee3ea5d3622d0fd9d3d2ba
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15479
Reviewed-by: Derk Rembold <rembold@de.ibm.com>
Tested-by: Derk Rembold <rembold@de.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'LAYOUT')
| -rw-r--r-- | LAYOUT | 16 |
1 files changed, 16 insertions, 0 deletions
@@ -0,0 +1,16 @@ +================================================================================ +-----------------------------PPE DIRECTORY STRUCTURE---------------------------- +================================================================================ + +sbe/ - FAPI-Lite SBE code to IPL the chip without the core and cache routine. + - May contain some PPE assembler files/functions. + +corecache/ - Core routines will also land in the CME image while cache routine will also land in the STOP GPE image. + - FAPI-Lite Hcode that initializes the core and cache chiplets. +pgpe/ - PState GPE code +ops/ - SBE chipOps -- may be delivered from the FW team but may have some early engineering forms +lib/ - FAPI-Lite Common PPE code routines (startclocks, arrayinit, etc) +pk/ - PPE Kernel + kernel/ - Base kernel + ppe42/ - Emulation function that don't exist in the PPE42 (div64, ppe_scom) +import/ - place for information about what needs to be mirrored into ppe build.
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