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author | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-09-19 22:56:06 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-09-20 01:45:39 -0400 |
commit | bcce27ba9b2da5717e4ff82484fc810642d6ee90 (patch) | |
tree | ee8fae6483be8daf5304a56bf11251ca2a652872 /LAYOUT | |
parent | 5ebcca122e9e20ed3500a0bb0fab52327e5d7f0f (diff) | |
download | talos-sbe-bcce27ba9b2da5717e4ff82484fc810642d6ee90.tar.gz talos-sbe-bcce27ba9b2da5717e4ff82484fc810642d6ee90.zip |
Removed layout file
Change-Id: I72ef094b309e42c36cdb18e298f2d6ea2863ec10
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29914
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'LAYOUT')
-rw-r--r-- | LAYOUT | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/LAYOUT b/LAYOUT deleted file mode 100644 index 38abdf67..00000000 --- a/LAYOUT +++ /dev/null @@ -1,16 +0,0 @@ -================================================================================ ------------------------------PPE DIRECTORY STRUCTURE---------------------------- -================================================================================ - -sbe/ - FAPI-Lite SBE code to IPL the chip without the core and cache routine. - - May contain some PPE assembler files/functions. - -corecache/ - Core routines will also land in the CME image while cache routine will also land in the STOP GPE image. - - FAPI-Lite Hcode that initializes the core and cache chiplets. -pgpe/ - PState GPE code -ops/ - SBE chipOps -- may be delivered from the FW team but may have some early engineering forms -lib/ - FAPI-Lite Common PPE code routines (startclocks, arrayinit, etc) -pk/ - PPE Kernel - kernel/ - Base kernel - ppe42/ - Emulation function that don't exist in the PPE42 (div64, ppe_scom) -import/ - place for information about what needs to be mirrored into ppe build.
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