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authorRahul Batra <rbatra@us.ibm.com>2017-12-20 13:31:00 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2018-01-19 21:59:23 -0500
commitf6c6b387000ca3f3ec0d1cb8c5cf3c1f87467d61 (patch)
treee5c2705cdc956c749005fb3dfd39801d4202e6a6
parent3d86b50a746e187d7f1281adfc5d0c67f0969576 (diff)
downloadtalos-sbe-f6c6b387000ca3f3ec0d1cb8c5cf3c1f87467d61.tar.gz
talos-sbe-f6c6b387000ca3f3ec0d1cb8c5cf3c1f87467d61.zip
PM: VDM Prolonged Droop Fix
Key_Cronus_Test=PM_REGRESS Change-Id: I73d38d6029a5b84590d1081855e12c145a535869 CQ: SW413192 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51338 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51345 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
index 7fce990c..af4fbbd2 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -51,6 +51,7 @@ enum PM_GPE_OCCFLG_DEFS
PGPE_PSTATE_PROTOCOL_ACTIVATE = 1, // @todo PGPE Hcode dependencies
PGPE_SAFE_MODE = 2,
PM_COMPLEX_SUSPEND = 3,
+ PGPE_PROLONGED_DROOP_WORKAROUND_ACTIVE = 7,
SGPE_ACTIVE = 8,
SGPE_IGNORE_STOP_CONTROL = 9,
SGPE_IGNORE_STOP_ACTION = 10,
@@ -64,6 +65,9 @@ enum PM_GPE_OCCFLG_DEFS
PIB_I2C_MASTER_ENGINE_2_LOCK_BIT1 = 19, //BIT0 ored BIT1 gives the field
PIB_I2C_MASTER_ENGINE_3_LOCK_BIT0 = 20, //BIT0 ored BIT1 gives the field
PIB_I2C_MASTER_ENGINE_3_LOCK_BIT1 = 21, //BIT0 ored BIT1 gives the field
+ PGPE_PM_RESET_SUPPRESS = 27,
+ WOF_HCODE_MODE_BIT0 = 28,
+ WOF_HCODE_MODE_BIT1 = 29,
REQUESTED_ACTIVE_QUAD_UPDATE = 30,
REQUEST_OCC_SAFE_STATE = 31
};
@@ -89,6 +93,7 @@ enum PM_GPE_OCC_SCRATCH2_DEFS
L3_CONTAINED_MODE = 11,
PGPE_SAFE_MODE_ERROR = 12,
PM_DEBUG_HALT_ENABLE = 15,
+ CORE_THROTTLE_CONTINUOUS_CHANGE_ENABLE = 16,
PGPE_OP_TRACE_DISABLE = 24,
PGPE_OP_TRACE_MEM_MODE = 25
};
@@ -135,6 +140,16 @@ enum PM_CME_SCRATCH_DEFS
//
+//Enum form of CPPM_CSAR
+//
+enum PM_CPPM_CSAR_DEFS
+{
+ CPPM_CSAR_DISABLE_CME_NACK_ON_PROLONGED_DROOP = 29,
+ CPPM_CSAR_PSTATE_HCODE_ERROR_INJECT = 30,
+ CPPM_CSAR_STOP_HCODE_ERROR_INJECT = 31
+};
+
+//
//Enum for of PPM Register Bits for FW Usage
//
enum PM_PPM_FW_FLAGS
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