Initf proc updates

*adding iox0 region for
cumulus and checking for
region goodness

*checking if iom regions are
enabled before putring call

Change-Id: Id15a2e5b8ee37703ba139348f8d293f265121760
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39365
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39367
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

4 files changed, 471 insertions, 161 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
index 6a5291fe..d027a486 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
@@ -36,7 +36,7 @@
 //------------------------------------------------------------------------------
 
 #include "p9_sbe_gptr_time_initf.H"
-
+#include "p9_const_common.H"
 #include "p9_perv_scom_addresses.H"
 #include <p9_ring_id.h>
 
@@ -45,21 +45,49 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
         fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
 {
     uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
+    fapi2::buffer<uint16_t> l_read_attr_pg;
+    bool mc01_iom01 = false;
+    bool mc01_iom23 = false;
+    bool mc23_iom01 = false;
+    bool mc23_iom23 = false;
 
     FAPI_INF("p9_sbe_gptr_time_initf: Entering ...");
 
+    for( auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+         ( fapi2::TARGET_STATE_FUNCTIONAL))
+    {
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos));
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, l_chplt_trgt, l_read_attr_pg));
+
+        if((l_attr_chip_unit_pos == MC01_CHIPLET_ID) && (!l_read_attr_pg.getBit<6>()))
+        {
+            mc01_iom01 = true;
+        }
+
+        if((l_attr_chip_unit_pos == MC01_CHIPLET_ID) && (!l_read_attr_pg.getBit<7>()))
+        {
+            mc01_iom23 = true;
+        }
+
+        if((l_attr_chip_unit_pos == MC23_CHIPLET_ID) && (!l_read_attr_pg.getBit<6>()))
+        {
+            mc23_iom01 = true;
+        }
+
+        if((l_attr_chip_unit_pos == MC23_CHIPLET_ID) && (!l_read_attr_pg.getBit<7>()))
+        {
+            mc23_iom23 = true;
+        }
+
+    }
+
     for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>
          (fapi2::TARGET_STATE_FUNCTIONAL))
     {
         FAPI_DBG("Scan mc_gptr ring");
         FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_gptr),
                  "Error from putRing (mc_gptr)");
-        FAPI_DBG("Scan mc_iom01_gptr ring");
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_gptr),
-                 "Error from putRing (mc_iom01_gptr)");
-        FAPI_DBG("Scan mc_iom23_gptr ring");
-        FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_gptr),
-                 "Error from putRing (mc_iom23_gptr)");
+
         FAPI_DBG("Scan mc_pll_gptr ring");
         FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_pll_gptr),
                  "Error from putRing (mc_pll_gptr)");
@@ -68,12 +96,53 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
                  "Error from putRing (mc_time)");
     }
 
+    // mcbist0
+    for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>
+         (fapi2::TARGET_FILTER_MC_WEST, fapi2::TARGET_STATE_FUNCTIONAL))
+    {
+        if ( mc01_iom01)
+        {
+            FAPI_DBG("Scan mc_iom01_gptr ring");
+            FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_gptr),
+                     "Error from putRing (mc_iom01_gptr)");
+        }
+
+        if( mc01_iom23 )
+        {
+            FAPI_DBG("Scan mc_iom23_gptr ring");
+            FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_gptr),
+                     "Error from putRing (mc_iom23_gptr)");
+        }
+    }
+
+    // mcbist1
+    for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>
+         (fapi2::TARGET_FILTER_MC_EAST, fapi2::TARGET_STATE_FUNCTIONAL))
+    {
+        if ( mc23_iom01 )
+        {
+            FAPI_DBG("Scan mc_iom01_gptr ring");
+            FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_gptr),
+                     "Error from putRing (mc_iom01_gptr)");
+        }
+
+        if( mc23_iom23 )
+        {
+            FAPI_DBG("Scan mc_iom23_gptr ring");
+            FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_gptr),
+                     "Error from putRing (mc_iom23_gptr)");
+        }
+    }
+
+
     for( auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
          ( fapi2::TARGET_STATE_FUNCTIONAL))
     {
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos));
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, l_chplt_trgt, l_read_attr_pg));
+        FAPI_DBG("ATTR_PG Value : %#04lx", l_read_attr_pg);
 
-        if ((l_attr_chip_unit_pos == 0x9))/* OBUS0 Chiplet */
+        if ((l_attr_chip_unit_pos == OB0_CHIPLET_ID))/* OBUS0 Chiplet */
         {
             FAPI_DBG("Scan ob0_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, ob0_gptr),
@@ -86,7 +155,7 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
                      "Error from putRing (ob0_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xA))/* OBUS1 Chiplet */
+        if ((l_attr_chip_unit_pos == OB1_CHIPLET_ID))/* OBUS1 Chiplet */
         {
             FAPI_DBG("Scan ob1_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, ob1_gptr),
@@ -99,7 +168,7 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
                      "Error from putRing (ob1_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xB))/* OBUS2 Chiplet */
+        if ((l_attr_chip_unit_pos == OB2_CHIPLET_ID))/* OBUS2 Chiplet */
         {
             FAPI_DBG("Scan ob2_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, ob2_gptr),
@@ -112,7 +181,7 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
                      "Error from putRing (ob2_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xC))/* OBUS3 Chiplet */
+        if ((l_attr_chip_unit_pos == OB3_CHIPLET_ID))/* OBUS3 Chiplet */
         {
             FAPI_DBG("Scan ob3_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, ob3_gptr),
@@ -125,32 +194,56 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
                      "Error from putRing (ob3_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x6))/* XBUS Chiplet */
+        if ((l_attr_chip_unit_pos == XB_CHIPLET_ID))/* XBUS Chiplet */
         {
             FAPI_DBG("Scan xb_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, xb_gptr),
                      "Error from putRing (xb_gptr)");
-            FAPI_DBG("Scan xb_io1_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_gptr),
-                     "Error from putRing (xb_io1_gptr)");
-            FAPI_DBG("Scan xb_io2_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_gptr),
-                     "Error from putRing (xb_io2_gptr)");
+
+            if (!l_read_attr_pg.getBit<5>()) // Cumulus chip - checking for iox0 region
+            {
+                FAPI_DBG("Scan xb_io0_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io0_gptr),
+                         "Error from putRing (xb_io0_gptr)");
+
+                FAPI_DBG("Scan xb_io0_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io0_time),
+                         "Error from putRing (xb_io0_time)");
+            }
+
+            if (!l_read_attr_pg.getBit<6>()) // checking for iox1 region
+            {
+                FAPI_DBG("Scan xb_io1_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_gptr),
+                         "Error from putRing (xb_io1_gptr)");
+
+                FAPI_DBG("Scan xb_io1_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_time),
+                         "Error from putRing (xb_io1_time)");
+            }
+
+            if (!l_read_attr_pg.getBit<7>()) // checking for iox2 region
+            {
+                FAPI_DBG("Scan xb_io2_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_gptr),
+                         "Error from putRing (xb_io2_gptr)");
+
+                FAPI_DBG("Scan xb_io2_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_time),
+                         "Error from putRing (xb_io2_time)");
+            }
+
             FAPI_DBG("Scan xb_pll_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, xb_pll_gptr),
                      "Error from putRing (xb_pll_gptr)");
             FAPI_DBG("Scan xb_time ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, xb_time),
                      "Error from putRing (xb_time)");
-            FAPI_DBG("Scan xb_io1_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_time),
-                     "Error from putRing (xb_io1_time)");
-            FAPI_DBG("Scan xb_io2_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_time),
-                     "Error from putRing (xb_io2_time)");
+
+
         }
 
-        if ((l_attr_chip_unit_pos == 0xD))/* PCI0 Chiplet */
+        if ((l_attr_chip_unit_pos == PCI0_CHIPLET_ID))/* PCI0 Chiplet */
         {
             FAPI_DBG("Scan pci0_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, pci0_gptr),
@@ -163,7 +256,7 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
                      "Error from putRing (pci0_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xE))/* PCI1 Chiplet */
+        if ((l_attr_chip_unit_pos == PCI1_CHIPLET_ID))/* PCI1 Chiplet */
         {
             FAPI_DBG("Scan pci1_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, pci1_gptr),
@@ -176,7 +269,7 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
                      "Error from putRing (pci1_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0xF))/* PCI2 Chiplet */
+        if ((l_attr_chip_unit_pos == PCI2_CHIPLET_ID))/* PCI2 Chiplet */
         {
             FAPI_DBG("Scan pci2_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, pci2_gptr),
@@ -189,76 +282,116 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
                      "Error from putRing (pci2_time)");
         }
 
-        if ((l_attr_chip_unit_pos == 0x2))/* N0 Chiplet */
+        if ((l_attr_chip_unit_pos == N0_CHIPLET_ID))/* N0 Chiplet */
         {
             FAPI_DBG("Scan n0_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n0_gptr),
                      "Error from putRing (n0_gptr)");
-            FAPI_DBG("Scan n0_nx_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_gptr),
-                     "Error from putRing (n0_nx_gptr)");
-            FAPI_DBG("Scan n0_cxa0_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_gptr),
-                     "Error from putRing (n0_cxa0_gptr)");
+
+            if (!l_read_attr_pg.getBit<5>()) //Check nx is enable
+            {
+                FAPI_DBG("Scan n0_nx_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_gptr),
+                         "Error from putRing (n0_nx_gptr)");
+
+                FAPI_DBG("Scan n0_nx_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_time),
+                         "Error from putRing (n0_nx_time)");
+            }
+
+            if (!l_read_attr_pg.getBit<6>()) //Check cxa0 is enable
+            {
+                FAPI_DBG("Scan n0_cxa0_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_gptr),
+                         "Error from putRing (n0_cxa0_gptr)");
+
+                FAPI_DBG("Scan n0_cxa0_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_time),
+                         "Error from putRing (n0_cxa0_time)");
+            }
+
             FAPI_DBG("Scan n0_time ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n0_time),
                      "Error from putRing (n0_time)");
-            FAPI_DBG("Scan n0_nx_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_time),
-                     "Error from putRing (n0_nx_time)");
-            FAPI_DBG("Scan n0_cxa0_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_time),
-                     "Error from putRing (n0_cxa0_time)");
+
         }
 
-        if ((l_attr_chip_unit_pos == 0x3))/* N1 Chiplet */
+        if ((l_attr_chip_unit_pos == N1_CHIPLET_ID))/* N1 Chiplet */
         {
             FAPI_DBG("Scan n1_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n1_gptr),
                      "Error from putRing (n1_gptr)");
-            FAPI_DBG("Scan n1_ioo0_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_gptr),
-                     "Error from putRing (n1_ioo0_gptr)");
-            FAPI_DBG("Scan n1_ioo1_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_gptr),
-                     "Error from putRing (n1_ioo1_gptr)");
-            FAPI_DBG("Scan n1_mcs23_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_gptr),
-                     "Error from putRing (n1_mcs23_gptr)");
+
+            if (!l_read_attr_pg.getBit<7>()) //Check pbioo0 is enable
+            {
+                FAPI_DBG("Scan n1_ioo0_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_gptr),
+                         "Error from putRing (n1_ioo0_gptr)");
+
+                FAPI_DBG("Scan n1_ioo0_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_time),
+                         "Error from putRing (n1_ioo0_time)");
+            }
+
+            if (!l_read_attr_pg.getBit<8>()) //Check pbioo1 is enable
+            {
+                FAPI_DBG("Scan n1_ioo1_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_gptr),
+                         "Error from putRing (n1_ioo1_gptr)");
+
+                FAPI_DBG("Scan n1_ioo1_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_time),
+                         "Error from putRing (n1_ioo1_time)");
+            }
+
+            if (!l_read_attr_pg.getBit<9>()) //Check mcs23 is enable
+            {
+                FAPI_DBG("Scan n1_mcs23_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_gptr),
+                         "Error from putRing (n1_mcs23_gptr)");
+
+                FAPI_DBG("Scan n1_mcs23_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_time),
+                         "Error from putRing (n1_mcs23_time)");
+            }
+
             FAPI_DBG("Scan n1_time ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n1_time),
                      "Error from putRing (n1_time)");
-            FAPI_DBG("Scan n1_ioo0_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_time),
-                     "Error from putRing (n1_ioo0_time)");
-            FAPI_DBG("Scan n1_ioo1_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_time),
-                     "Error from putRing (n1_ioo1_time)");
-            FAPI_DBG("Scan n1_mcs23_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_time),
-                     "Error from putRing (n1_mcs23_time)");
+
         }
 
-        if ((l_attr_chip_unit_pos == 0x4))/* N2 Chiplet */
+        if ((l_attr_chip_unit_pos == N2_CHIPLET_ID))/* N2 Chiplet */
         {
             FAPI_DBG("Scan n2_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n2_gptr),
                      "Error from putRing (n2_gptr)");
-            FAPI_DBG("Scan n2_psi_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_psi_gptr),
-                     "Error from putRing (n2_psi_gptr)");
-            FAPI_DBG("Scan n2_cxa1_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_gptr),
-                     "Error from putRing (n2_cxa1_gptr)");
+
+            if (!l_read_attr_pg.getBit<9>()) //Check iopsi is enable
+            {
+                FAPI_DBG("Scan n2_psi_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n2_psi_gptr),
+                         "Error from putRing (n2_psi_gptr)");
+            }
+
+            if (!l_read_attr_pg.getBit<5>()) //Check cxa1 is enable
+            {
+                FAPI_DBG("Scan n2_cxa1_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_gptr),
+                         "Error from putRing (n2_cxa1_gptr)");
+
+                FAPI_DBG("Scan n2_cxa1_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_time),
+                         "Error from putRing (n2_cxa1_time)");
+            }
+
             FAPI_DBG("Scan n2_time ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n2_time),
                      "Error from putRing (n2_time)");
-            FAPI_DBG("Scan n2_cxa1_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_time),
-                     "Error from putRing (n2_cxa1_time)");
+
         }
 
-        if ((l_attr_chip_unit_pos == 0x5))/* N3 Chiplet */
+        if ((l_attr_chip_unit_pos == N3_CHIPLET_ID))/* N3 Chiplet */
         {
             FAPI_DBG("Scan n3_gptr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n3_gptr),
@@ -266,18 +399,29 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const
             FAPI_DBG("Scan n3_time ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n3_time),
                      "Error from putRing (n3_time)");
-            FAPI_DBG("Scan n3_np_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_gptr),
-                     "Error from putRing (n3_np_gptr)");
-            FAPI_DBG("Scan n3_mcs01_gptr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_gptr),
-                     "Error from putRing (n3_mcs01_gptr)");
-            FAPI_DBG("Scan n3_mcs01_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_time),
-                     "Error from putRing (n3_mcs01_time)");
-            FAPI_DBG("Scan n3_np_time ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_time),
-                     "Error from putRing (n3_np_time)");
+
+            if (!l_read_attr_pg.getBit<7>()) // check npu is enabled
+            {
+                FAPI_DBG("Scan n3_np_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_gptr),
+                         "Error from putRing (n3_np_gptr)");
+
+                FAPI_DBG("Scan n3_np_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_time),
+                         "Error from putRing (n3_np_time)");
+            }
+
+            if (!l_read_attr_pg.getBit<10>()) //Check mcs01 is enable
+            {
+                FAPI_DBG("Scan n3_mcs01_gptr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_gptr),
+                         "Error from putRing (n3_mcs01_gptr)");
+
+                FAPI_DBG("Scan n3_mcs01_time ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_time),
+                         "Error from putRing (n3_mcs01_time)");
+            }
+
         }
     }
 
@@ -286,4 +430,3 @@ fapi_try_exit:
     return fapi2::current_err;
 
 }
-
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
index 7b9a3b3e..2de6a840 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
@@ -47,11 +47,13 @@ fapi2::ReturnCode p9_sbe_io_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CH
 {
     FAPI_INF("p9_sbe_io_initf: Entering ...");
     uint8_t l_attr_chip_unit_pos = 0;
+    fapi2::buffer<uint16_t> l_read_attr_pg;
 
     for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL))
     {
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos));
-
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, l_chplt_trgt, l_read_attr_pg));
+        FAPI_DBG("ATTR_PG Value : %#04lx", l_read_attr_pg);
 #if 0
         {
             // PCIx FURE rings require deterministic scan enable
@@ -59,7 +61,7 @@ fapi2::ReturnCode p9_sbe_io_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CH
             fapi2::buffer<uint64_t> l_data64;
             l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_DETERMINISTIC_TEST_ENABLE_DC>();
 
-            if (l_attr_chip_unit_pos == 0xD)/* PCI0 Chiplet */
+            if (l_attr_chip_unit_pos == PCI0_CHIPLET_ID)/* PCI0 Chiplet */
             {
                 FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI0_CPLT_CTRL0_OR, l_data64));
                 FAPI_DBG("Scan pci0_fure ring");
@@ -68,7 +70,7 @@ fapi2::ReturnCode p9_sbe_io_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CH
                 FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI0_CPLT_CTRL0_CLEAR, l_data64));
             }
 
-            if (l_attr_chip_unit_pos == 0xE)/* PCI1 Chiplet */
+            if (l_attr_chip_unit_pos == PCI1_CHIPLET_ID)/* PCI1 Chiplet */
             {
                 FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI1_CPLT_CTRL0_OR, l_data64));
                 FAPI_DBG("Scan pci1_fure ring");
@@ -77,7 +79,7 @@ fapi2::ReturnCode p9_sbe_io_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CH
                 FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI1_CPLT_CTRL0_CLEAR, l_data64));
             }
 
-            if (l_attr_chip_unit_pos == 0xF)/* PCI2 Chiplet */
+            if (l_attr_chip_unit_pos == PCI2_CHIPLET_ID)/* PCI2 Chiplet */
             {
                 FAPI_TRY(fapi2::putScom(l_target_chip, PERV_PCI2_CPLT_CTRL0_OR, l_data64));
                 FAPI_DBG("Scan pci2_fure ring");
@@ -118,12 +120,27 @@ fapi2::ReturnCode p9_sbe_io_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CH
 
         if (l_attr_chip_unit_pos == XB_CHIPLET_ID)/* XBUS Chiplet */
         {
-            FAPI_DBG("Scan xb_io1_fure ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_fure),
-                     "Error from putRing (xb_io1_fure)");
-            FAPI_DBG("Scan xb_io2_fure ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_fure),
-                     "Error from putRing (xb_io2_fure)");
+            if (!l_read_attr_pg.getBit<5>()) // Cumulus chip - checking for iox0 region
+            {
+                FAPI_DBG("Scan xb_io0_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io0_fure),
+                         "Error from putRing (xb_io0_fure)");
+            }
+
+            if (!l_read_attr_pg.getBit<6>()) // checking for iox1 region
+            {
+                FAPI_DBG("Scan xb_io1_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_fure),
+                         "Error from putRing (xb_io1_fure)");
+            }
+
+            if (!l_read_attr_pg.getBit<7>()) // checking for iox2 region
+            {
+                FAPI_DBG("Scan xb_io2_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_fure),
+                         "Error from putRing (xb_io2_fure)");
+            }
+
             FAPI_DBG("Scan xb_fure ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, xb_fure),
                      "Error from putRing (xb_fure)");
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
index a3169936..39037604 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
@@ -40,6 +40,7 @@
 #include "p9_sbe_nest_initf.H"
 #include "p9_perv_scom_addresses.H"
 #include "p9_perv_scom_addresses_fld.H"
+#include "p9_const_common.H"
 #include <p9_ring_id.h>
 
 fapi2::ReturnCode p9_sbe_nest_initf(const
@@ -48,6 +49,12 @@ fapi2::ReturnCode p9_sbe_nest_initf(const
     FAPI_INF("Entering ...");
     uint8_t l_attr_chip_unit_pos = 0;
     fapi2::buffer<uint16_t> l_read_attr;
+#if 0
+    bool mc01_iom01 = false;
+    bool mc01_iom23 = false;
+    bool mc23_iom01 = false;
+    bool mc23_iom23 = false;
+#endif
 
     for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL))
     {
@@ -55,20 +62,53 @@ fapi2::ReturnCode p9_sbe_nest_initf(const
         FAPI_DBG("ATTR_PG Value : %#04lx", l_read_attr);
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos));
 
-        if (l_attr_chip_unit_pos == 0x2)/* N0 Chiplet */
+#if 0
+
+        if((l_attr_chip_unit_pos == MC01_CHIPLET_ID) && (!l_read_attr.getBit<6>()))
         {
-            FAPI_DBG("Scan n0_cxa_fure ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_fure),
-                     "Error from putRing (n0_cxa0_fure)");
+            mc01_iom01 = true;
+        }
+
+        if((l_attr_chip_unit_pos == MC01_CHIPLET_ID) && (!l_read_attr.getBit<7>()))
+        {
+            mc01_iom23 = true;
+        }
+
+        if((l_attr_chip_unit_pos == MC23_CHIPLET_ID) && (!l_read_attr.getBit<6>()))
+        {
+            mc23_iom01 = true;
+        }
+
+        if((l_attr_chip_unit_pos == MC23_CHIPLET_ID) && (!l_read_attr.getBit<7>()))
+        {
+            mc23_iom23 = true;
+        }
+
+#endif
+
+        if (l_attr_chip_unit_pos == N0_CHIPLET_ID)/* N0 Chiplet */
+        {
+
+            if (!l_read_attr.getBit<6>()) //Check cxa0 is enable
+            {
+                FAPI_DBG("Scan n0_cxa_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_fure),
+                         "Error from putRing (n0_cxa0_fure)");
+            }
+
             FAPI_DBG("Scan n0_fure ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n0_fure),
                      "Error from putRing (n0_fure)");
-            FAPI_DBG("Scan n0_nx_fure ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_fure),
-                     "Error from putRing (n0_nx_fure)");
+
+            if (!l_read_attr.getBit<5>()) //Check nx is enable
+            {
+                FAPI_DBG("Scan n0_nx_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_fure),
+                         "Error from putRing (n0_nx_fure)");
+            }
         }
 
-        if (l_attr_chip_unit_pos == 0x3)/* N1 Chiplet */
+        if (l_attr_chip_unit_pos == N1_CHIPLET_ID)/* N1 Chiplet */
         {
             FAPI_DBG("Scan n1_fure ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n1_fure),
@@ -96,20 +136,29 @@ fapi2::ReturnCode p9_sbe_nest_initf(const
             }
         }
 
-        if (l_attr_chip_unit_pos == 0x4)/* N2 Chiplet */
+        if (l_attr_chip_unit_pos == N2_CHIPLET_ID)/* N2 Chiplet */
         {
-            FAPI_DBG("Scan n2_cxa1_fure ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_fure),
-                     "Error from putRing (n2_cxa1_fure)");
+
+            if (!l_read_attr.getBit<5>()) //Check cxa1 is enable
+            {
+                FAPI_DBG("Scan n2_cxa1_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_fure),
+                         "Error from putRing (n2_cxa1_fure)");
+            }
+
             FAPI_DBG("Scan n2_fure ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n2_fure),
                      "Error from putRing (n2_fure)");
-            FAPI_DBG("Scan n2_psi_fure ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_psi_fure),
-                     "Error from putRing (n2_psi_fure)");
+
+            if (!l_read_attr.getBit<9>()) //Check iopsi is enable
+            {
+                FAPI_DBG("Scan n2_psi_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n2_psi_fure),
+                         "Error from putRing (n2_psi_fure)");
+            }
         }
 
-        if (l_attr_chip_unit_pos == 0x05)/* N3 Chiplet */
+        if (l_attr_chip_unit_pos == N3_CHIPLET_ID)/* N3 Chiplet */
         {
             FAPI_DBG("Scan n3_fure ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n3_fure),
@@ -122,34 +171,83 @@ fapi2::ReturnCode p9_sbe_nest_initf(const
                          "Error from putRing (n3_mcs01_fure)");
             }
 
-            FAPI_DBG("Scan n3_np_fure ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_fure),
-                     "Error from putRing (n3_np_fure)");
+            if (!l_read_attr.getBit<7>()) //Check npu is enable
+            {
+                FAPI_DBG("Scan n3_np_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_fure),
+                         "Error from putRing (n3_np_fure)");
+            }
         }
     }
 
     for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL))
     {
         FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_fure));
+    }
+
 #if 0
+
+    // mcbist0
+    for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>
+         (fapi2::TARGET_FILTER_MC_WEST, fapi2::TARGET_STATE_FUNCTIONAL))
+    {
         {
             // MC IOMxx FURE rings require deterministic scan enable
             // no current plan to scan these during mainline IPL, but recipe is below if needed
             fapi2::buffer<uint64_t> l_data64;
             l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_DETERMINISTIC_TEST_ENABLE_DC>();
             FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_MC01_CPLT_CTRL0_OR, l_data64));
-            FAPI_DBG("Scan mc_iom01_fure ring");
-            FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_fure),
-                     "Error from putRing (mc_iom01_fure)");
-            FAPI_DBG("Scan mc_iom23_fure ring");
-            FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_fure),
-                     "Error from putRing (mc_iom23_fure)");
+
+            if ( mc01_iom01 )
+            {
+                FAPI_DBG("Scan mc_iom01_fure ring");
+                FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_fure),
+                         "Error from putRing (mc_iom01_fure)");
+            }
+
+            if( mc01_iom23 )
+            {
+                FAPI_DBG("Scan mc_iom23_fure ring");
+                FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_fure),
+                         "Error from putRing (mc_iom23_fure)");
+            }
+
             FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_MC01_CPLT_CTRL0_CLEAR, l_data64));
         }
-#endif
+    }
 
+    // mcbist1
+    for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>
+         (fapi2::TARGET_FILTER_MC_EAST, fapi2::TARGET_STATE_FUNCTIONAL))
+    {
+        {
+            // MC IOMxx FURE rings require deterministic scan enable
+            // no current plan to scan these during mainline IPL, but recipe is below if needed
+            fapi2::buffer<uint64_t> l_data64;
+            l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_DETERMINISTIC_TEST_ENABLE_DC>();
+            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_MC01_CPLT_CTRL0_OR, l_data64));
+
+            if ( mc23_iom01 )
+            {
+                FAPI_DBG("Scan mc_iom01_fure ring");
+                FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom01_fure),
+                         "Error from putRing (mc_iom01_fure)");
+            }
+
+            if( mc23_iom23 )
+            {
+                FAPI_DBG("Scan mc_iom23_fure ring");
+                FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_iom23_fure),
+                         "Error from putRing (mc_iom23_fure)");
+            }
+
+            FAPI_TRY(fapi2::putScom(l_chplt_trgt, PERV_MC01_CPLT_CTRL0_CLEAR, l_data64));
+        }
     }
 
+#endif
+
+
 fapi_try_exit:
     FAPI_INF("Exiting ...");
     return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
index 3f62c9b8..60e10603 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
@@ -37,6 +37,7 @@
 
 #include "p9_sbe_repr_initf.H"
 #include "p9_perv_scom_addresses.H"
+#include "p9_const_common.H"
 #include <p9_ring_id.h>
 
 
@@ -44,6 +45,8 @@ fapi2::ReturnCode p9_sbe_repr_initf(const
                                     fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
 {
     uint8_t l_attr_chip_unit_pos = 0;
+    fapi2::buffer<uint16_t> l_read_attr_pg;
+
     FAPI_INF("p9_sbe_repr_initf: Entering ...");
 
     for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL))
@@ -54,119 +57,168 @@ fapi2::ReturnCode p9_sbe_repr_initf(const
     for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL))
     {
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos));
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, l_chplt_trgt, l_read_attr_pg));
+        FAPI_DBG("ATTR_PG Value : %#04lx", l_read_attr_pg);
 
-        if (l_attr_chip_unit_pos == 0x9)/* OBUS0 Chiplet */
+        if (l_attr_chip_unit_pos == OB0_CHIPLET_ID)/* OBUS0 Chiplet */
         {
             FAPI_DBG("Scan ob0_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, ob0_repr),
                      "Error from putRing (ob0_repr)");
         }
 
-        if (l_attr_chip_unit_pos == 0xA)/* OBUS1 Chiplet */
+        if (l_attr_chip_unit_pos == OB1_CHIPLET_ID)/* OBUS1 Chiplet */
         {
             FAPI_DBG("Scan ob1_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, ob1_repr),
                      "Error from putRing (ob1_repr)");
         }
 
-        if (l_attr_chip_unit_pos == 0xB)/* OBUS2 Chiplet */
+        if (l_attr_chip_unit_pos == OB2_CHIPLET_ID)/* OBUS2 Chiplet */
         {
             FAPI_DBG("Scan ob2_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, ob2_repr),
                      "Error from putRing (ob2_repr)");
         }
 
-        if (l_attr_chip_unit_pos == 0xC)/* OBUS3 Chiplet */
+        if (l_attr_chip_unit_pos == OB3_CHIPLET_ID)/* OBUS3 Chiplet */
         {
             FAPI_DBG("Scan ob3_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, ob3_repr),
                      "Error from putRing (ob3_repr)");
         }
 
-        if (l_attr_chip_unit_pos == 0x6)/* XBUS Chiplet */
+        if (l_attr_chip_unit_pos == XB_CHIPLET_ID)/* XBUS Chiplet */
         {
             FAPI_DBG("Scan xb_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, xb_repr),
                      "Error from putRing (xb_repr)");
-            FAPI_DBG("Scan xb_io1_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_repr),
-                     "Error from putRing (xb_io1_repr)");
-            FAPI_DBG("Scan xb_io2_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_repr),
-                     "Error from putRing (xb_io2_repr)");
+
+            if (!l_read_attr_pg.getBit<5>()) // Cumulus chip - checking for iox1 region
+            {
+                FAPI_DBG("Scan xb_io0_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io0_repr),
+                         "Error from putRing (xb_io0_repr)");
+            }
+
+            if (!l_read_attr_pg.getBit<6>()) // checking for iox1 region
+            {
+                FAPI_DBG("Scan xb_io1_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io1_repr),
+                         "Error from putRing (xb_io1_repr)");
+            }
+
+            if (!l_read_attr_pg.getBit<7>()) // checking for iox2 region
+            {
+                FAPI_DBG("Scan xb_io2_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, xb_io2_repr),
+                         "Error from putRing (xb_io2_repr)");
+            }
         }
 
-        if (l_attr_chip_unit_pos == 0xD)/* PCI0 Chiplet */
+        if (l_attr_chip_unit_pos == PCI0_CHIPLET_ID)/* PCI0 Chiplet */
         {
             FAPI_DBG("Scan pci0_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, pci0_repr),
                      "Error from putRing (pci0_repr)");
         }
 
-        if (l_attr_chip_unit_pos == 0xE)/* PCI1 Chiplet */
+        if (l_attr_chip_unit_pos == PCI1_CHIPLET_ID)/* PCI1 Chiplet */
         {
             FAPI_DBG("Scan pci1_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, pci1_repr),
                      "Error from putRing (pci1_repr)");
         }
 
-        if (l_attr_chip_unit_pos == 0xF)/* PCI2 Chiplet */
+        if (l_attr_chip_unit_pos == PCI2_CHIPLET_ID)/* PCI2 Chiplet */
         {
             FAPI_DBG("Scan pci2_repr_ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, pci2_repr),
                      "Error from putRing (pci2_repr)");
         }
 
-        if (l_attr_chip_unit_pos == 0x2)/* N0 Chiplet */
+        if (l_attr_chip_unit_pos == N0_CHIPLET_ID)/* N0 Chiplet */
         {
             FAPI_DBG("Scan n0_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n0_repr),
                      "Error from putRing (n0_repr)");
-            FAPI_DBG("Scan n0_nx_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_repr),
-                     "Error from putRing (n0_nx_repr)");
-            FAPI_DBG("Scan n0_cxa0_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_repr),
-                     "Error from putRing (n0_cxa0_repr)");
+
+            if (!l_read_attr_pg.getBit<5>()) //Check nx is enable
+            {
+                FAPI_DBG("Scan n0_nx_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n0_nx_repr),
+                         "Error from putRing (n0_nx_repr)");
+            }
+
+            if (!l_read_attr_pg.getBit<6>()) //Check cxa0 is enable
+            {
+                FAPI_DBG("Scan n0_cxa0_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n0_cxa0_repr),
+                         "Error from putRing (n0_cxa0_repr)");
+            }
         }
 
-        if (l_attr_chip_unit_pos == 0x3)/* N1 Chiplet */
+        if (l_attr_chip_unit_pos == N1_CHIPLET_ID)/* N1 Chiplet */
         {
             FAPI_DBG("Scan n1_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n1_repr),
                      "Error from putRing (n1_repr)");
-            FAPI_DBG("Scan n1_ioo0_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_repr),
-                     "Error from putRing (n1_ioo0_repr)");
-            FAPI_DBG("Scan n1_ioo1_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_repr),
-                     "Error from putRing (n1_ioo1_repr)");
-            FAPI_DBG("Scan n1_mcs23_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_repr),
-                     "Error from putRing (n1_mcs23_repr)");
+
+            if (!l_read_attr_pg.getBit<7>()) //Check pbioo0 is enable
+            {
+                FAPI_DBG("Scan n1_ioo0_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_repr),
+                         "Error from putRing (n1_ioo0_repr)");
+            }
+
+            if (!l_read_attr_pg.getBit<8>()) //Check pbioo1 is enable
+            {
+                FAPI_DBG("Scan n1_ioo1_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_repr),
+                         "Error from putRing (n1_ioo1_repr)");
+            }
+
+            if (!l_read_attr_pg.getBit<9>()) //Check mcs23 is enable
+            {
+                FAPI_DBG("Scan n1_mcs23_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_repr),
+                         "Error from putRing (n1_mcs23_repr)");
+            }
         }
 
-        if (l_attr_chip_unit_pos == 0x4)/* N2 Chiplet */
+        if (l_attr_chip_unit_pos == N2_CHIPLET_ID)/* N2 Chiplet */
         {
             FAPI_DBG("Scan n2_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n2_repr),
                      "Error from putRing (n2_repr)");
-            FAPI_DBG("Scan n2_cxa1_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_repr),
-                     "Error from putRing (n2_cxa1_repr)");
+
+            if (!l_read_attr_pg.getBit<5>()) //Check cxa1 is enable
+            {
+                FAPI_DBG("Scan n2_cxa1_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n2_cxa1_repr),
+                         "Error from putRing (n2_cxa1_repr)");
+            }
         }
 
-        if (l_attr_chip_unit_pos == 0x5)/* N3 Chiplet */
+        if (l_attr_chip_unit_pos == N3_CHIPLET_ID)/* N3 Chiplet */
         {
             FAPI_DBG("Scan n3_repr ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n3_repr),
                      "Error from putRing (n3_repr)");
-            FAPI_DBG("Scan n3_mcs01_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_repr),
-                     "Error from putRing (n3_mcs01_repr)");
-            FAPI_DBG("Scan n3_np_repr ring");
-            FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_repr),
-                     "Error from putRing (n3_np_repr)");
+
+            if (!l_read_attr_pg.getBit<10>()) //Check mcs01 is enable
+            {
+                FAPI_DBG("Scan n3_mcs01_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_repr),
+                         "Error from putRing (n3_mcs01_repr)");
+            }
+
+            if (!l_read_attr_pg.getBit<7>()) //Check npu is enable
+            {
+                FAPI_DBG("Scan n3_np_repr ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_repr),
+                         "Error from putRing (n3_np_repr)");
+            }
         }
     }