ppe42 Icache aligned divide

Change-Id: Ibb58bdd022641857cc94fbf17c5977a600a5bb6a
RTC:147209
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30374
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Dev-Ready: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30379
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

3 files changed, 60 insertions, 45 deletions

diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/div32.S b/src/import/chips/p9/procedures/ppe/pk/ppe42/div32.S
index bcf01a1a..960dce4d 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/div32.S
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/div32.S
@@ -22,4 +22,61 @@
 # permissions and limitations under the License.
 #
 # IBM_PROLOG_END_TAG
-## Place holder for new file - prime for mirroring.
+    .nolist
+#include "ppe42_asm.h"
+    .list
+    .section    .text.divide,"ax",@progbits
+    .align 5
+
+    ## The following code MUST be 32 byte aligned and fit in Icache
+    ## for optimum performance.
+udivmodsi4_loop:
+    cmplwbge    %r4, %r3, .L1
+    bdz         .L2
+    bwltz       %r4,.L1
+    rlwinm      %r4, %r4, 1, 0, 30
+    rlwinm      %r9, %r9, 1, 0, 30
+    b           udivmodsi4_loop
+.L2:
+    li          %r9,0
+.L1:
+    li          %r10,0
+.L5:
+    bwz         %r9, .L3
+    cmplwblt    %r3, %r4, .L4
+    subf        %r3, %r4, %r3
+    or          %r10, %r10, %r9
+.L4:
+    rlwinm      %r9, %r9, 31, 1, 31
+    rlwinm      %r4, %r4, 31, 1, 31
+    b           .L5
+.L3:
+    bwnz        %r5, .L6
+    mr          %r3,%r10
+.L6:
+    blr
+
+    .section    .text.__udivsi3,"ax",@progbits
+    .align      2
+    .globl  __udivsi3
+    .type   __udivsi3 @function
+__udivsi3:
+    li          %r5, 0
+    li          %r10, 33
+    mtctr       %r10
+    li          %r9,1
+    b           udivmodsi4_loop
+
+
+    .section    .text._umodsi3,"ax",@progbits
+    .align      2
+    .globl _umodsi3
+    .type   _umodsi3, @function
+_umodsi3:
+    li          %r5, 1
+    li          %r10, 33
+    mtctr       %r10
+    li          %r9,1
+    b           udivmodsi4_loop
+
+
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/math.c b/src/import/chips/p9/procedures/ppe/pk/ppe42/math.c
index a860b92e..10943ce8 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/math.c
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/math.c
@@ -29,38 +29,6 @@ extern "C"
 {
 #endif
 
-unsigned long
-udivmodsi4(unsigned long num, unsigned long den, int modwanted)
-{
-    unsigned long bit = 1;
-    unsigned long res = 0;
-
-    while (den < num && bit && !(den & (1L << 31)))
-    {
-        den <<= 1;
-        bit <<= 1;
-    }
-
-    while (bit)
-    {
-        if (num >= den)
-        {
-            num -= den;
-            res |= bit;
-        }
-
-        bit >>= 1;
-        den >>= 1;
-    }
-
-    if (modwanted)
-    {
-        return num;
-    }
-
-    return res;
-}
-
 // 64 bit divide.  Note: TBD add when needed
 //unsigned long long __udivdi3(unsigned long long a, unsigned long long b)
 //{
@@ -68,17 +36,6 @@ udivmodsi4(unsigned long num, unsigned long den, int modwanted)
 //    return c;
 //}
 
-// 32 bit unsigned integer divide
-unsigned long __udivsi3(unsigned long a, unsigned long b)
-{
-    return udivmodsi4(a, b, 0);
-}
-
-// 32 bit modulus
-unsigned long __umodsi3(unsigned long a, unsigned long b)
-{
-    return udivmodsi4(a, b, 1);
-}
 
 // 32 bit signed divide
 int __divsi3(int _a, int _b)
diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/pkppe42files.mk b/src/import/chips/p9/procedures/ppe/pk/ppe42/pkppe42files.mk
index 3d3fe8c6..63577c9d 100644
--- a/src/import/chips/p9/procedures/ppe/pk/ppe42/pkppe42files.mk
+++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/pkppe42files.mk
@@ -59,7 +59,8 @@ PPE42-C-SOURCES = ppe42_core.c \
 PPE42-S-SOURCES =  ppe42_boot.S \
 		   ppe42_exceptions.S\
 		   div64.S\
-		   ppe42_timebase.S
+		   ppe42_timebase.S\
+		   div32.S
 
 PPE42-TIMER-C-SOURCES =
 PPE42-TIMER-S-SOURCES =