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author | Thi Tran <thi@us.ibm.com> | 2017-05-23 17:43:46 -0500 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-06-01 05:05:20 -0400 |
commit | cddea0367977c535d5faed617d565bf6f8ddb797 (patch) | |
tree | 45f5a5954a7c29f7244bdd19e20d17d4a5c9dff6 | |
parent | 5e79f248d15326a60f44f8d200fbfb366e500223 (diff) | |
download | talos-sbe-cddea0367977c535d5faed617d565bf6f8ddb797.tar.gz talos-sbe-cddea0367977c535d5faed617d565bf6f8ddb797.zip |
P9 Cumulus InitCompiler supportis - Part 3
- Update *.mk files to support p9c chip ID
- Workaround some spy issues p9c 10 engd issues
- Fix bug to allow compilation without ENGD
Change-Id: Ie94b55c93081108668725d3ee9b88bd34eaa794f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40904
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40952
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
4 files changed, 25 insertions, 15 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C index be84a853..9177e051 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C @@ -107,7 +107,7 @@ fapi2::ReturnCode p9_l3_scom(const fapi2::Target<fapi2::TARGET_TYPE_EX>& TGT0, l_scom_buffer.insert<1, 1, 63, uint64_t>(l_EXP_L3_L3_MISC_L3CERRS_L3_DMAP_CI_EN_CFG_OFF ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { if ((l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_GROUP)) { @@ -121,7 +121,7 @@ fapi2::ReturnCode p9_l3_scom(const fapi2::Target<fapi2::TARGET_TYPE_EX>& TGT0, } } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { constexpr auto l_EXP_L3_L3_MISC_L3CERRS_L3_CERRS_LRU_DECR_EN_CFG_ON = 0x1; l_scom_buffer.insert<30, 1, 63, uint64_t>(l_EXP_L3_L3_MISC_L3CERRS_L3_CERRS_LRU_DECR_EN_CFG_ON ); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C index f1308e10..464897ef 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C @@ -112,7 +112,7 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& l_scom_buffer.insert<39, 1, 63, uint64_t>(l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_CFG_PUMP_MODE_OFF ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { l_scom_buffer.insert<8, 3, 61, uint64_t>(literal_0x3 ); } @@ -120,7 +120,7 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& FAPI_TRY(fapi2::putScom(TGT0, 0x5012c15ull, l_scom_buffer)); } { - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { FAPI_TRY(fapi2::getScom( TGT0, 0x5012c1dull, l_scom_buffer )); @@ -180,10 +180,19 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& l_scom_buffer.insert<0, 12, 52, uint64_t>(literal_0x000 ); } - constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TW_RDX_PWC_DIS_ON = 0x1; - l_scom_buffer.insert<52, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TW_RDX_PWC_DIS_ON ); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TW_RDX_PWC_DIS_ON = 0x1; + l_scom_buffer.insert<52, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TW_RDX_PWC_DIS_ON ); + } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + if (((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) + { + constexpr auto l_NMMU_MM_CFG_NMMU_DD2_ISS734_FIX_MODE_OPT3_ENA_IGNORE_PWC_PTE_HIT = 0x3ffe; + l_scom_buffer.insert<52, 1, 50, uint64_t>(l_NMMU_MM_CFG_NMMU_DD2_ISS734_FIX_MODE_OPT3_ENA_IGNORE_PWC_PTE_HIT ); + } + + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TW_LCO_RDX_EN_ON = 0x1; l_scom_buffer.insert<44, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TW_LCO_RDX_EN_ON ); @@ -204,7 +213,7 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& FAPI_TRY(fapi2::putScom(TGT0, 0x5012c53ull, l_scom_buffer)); } { - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { FAPI_TRY(fapi2::getScom( TGT0, 0x5012c54ull, l_scom_buffer )); @@ -219,7 +228,7 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TLB_ISS543B_FIX_EN_ON = 0x1; l_scom_buffer.insert<53, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TLB_ISS543B_FIX_EN_ON ); - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { constexpr auto l_NMMU_MM_MPSS_MODE_MPSS_ENA_PREF_PGSZ_ENA_G_64KB_H_64KB = 0x155; l_scom_buffer.insert<19, 1, 54, uint64_t>(l_NMMU_MM_MPSS_MODE_MPSS_ENA_PREF_PGSZ_ENA_G_64KB_H_64KB ); @@ -238,7 +247,7 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& l_scom_buffer.insert<21, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS_OFF ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { constexpr auto l_NMMU_MM_CFG_TWSM_SPLIT_MODE_TWSM_SPLIT_08_TLB_04_SLB = 0x0; l_scom_buffer.insert<57, 1, 63, uint64_t>(l_NMMU_MM_CFG_TWSM_SPLIT_MODE_TWSM_SPLIT_08_TLB_04_SLB ); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C index b81bacd2..1ba922d0 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C @@ -51,7 +51,7 @@ fapi2::ReturnCode p9_ncu_scom(const fapi2::Target<fapi2::TARGET_TYPE_EX>& TGT0, constexpr auto l_EXP_NC_NCMISC_NCSCOMS_SYSMAP_SM_NOT_LG_SEL_OFF = 0x0; l_scom_buffer.insert<9, 1, 63, uint64_t>(l_EXP_NC_NCMISC_NCSCOMS_SYSMAP_SM_NOT_LG_SEL_OFF ); - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { if ((l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_GROUP)) { diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index e6d991be..1ba3b43e 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -3365,16 +3365,17 @@ </chip> </chipEcFeature> </attribute> - <!-- ********************************************************************* --> + <!-- ******************************************************************** --> <attribute> - <id>ATTR_CHIP_EC_FEATURE_HAS_DMI</id> + <id>ATTR_CHIP_EC_FEATURE_RTC_174656_SKIP_CUMULUS</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - Returns if a chip has a DMI link + Only apply spy to Nimbus, skip for Cumulus. + This is because p9c_10.spydef doesn't have the spy yet. </description> <chipEcFeature> <chip> - <name>ENUM_ATTR_NAME_CUMULUS</name> + <name>ENUM_ATTR_NAME_NIMBUS</name> <ec> <value>0x10</value> <test>GREATER_THAN_OR_EQUAL</test> |