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author | Joachim Fenkes <fenkes@de.ibm.com> | 2016-04-04 17:51:23 +0200 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-06-23 04:53:26 -0400 |
commit | cdda097460ca649a6feeb7f2d2eb975adf14cc02 (patch) | |
tree | a4ff6579758948d94d2b77dbd34ae78484f86926 | |
parent | d79c232b553eef0aa2fcd16c818f6d17891c9dea (diff) | |
download | talos-sbe-cdda097460ca649a6feeb7f2d2eb975adf14cc02.tar.gz talos-sbe-cdda097460ca649a6feeb7f2d2eb975adf14cc02.zip |
Add p9_proc_gettracearray procedure
Generic procedure to dump a trace array. The API is similar to the P8 procedure,
but the procedure takes trace _bus_ IDs as opposed to trace _array_ IDs and uses
these to check the trace array's primary trace MUXes prior to dumping. There is
also a flag to skip this check if you want to dump a specific trace array no
matter which bus is muxed into it.
The FAPI2 target supplied must match the trace array; most will just need a
TARGET_TYPE_PROC_CHIP target, but some are targeted at OBUS, MCBIST, EX or CORE
granularity. There's an inline function proc_gettracearray_target_type() that
will help determine the target type.
Change-Id: I093cd03bc90fbe93ed8fff3d18cd0676359fa5d1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22847
Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22848
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r-- | import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index d89a34ad..b56d4cea 100644 --- a/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -25,12 +25,30 @@ <attributes> <!-- ********************************************************************* --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_CORE_TRACE_SCOMABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Returns true if the core trace arrays are dumpable via SCOM. + Nimbus EC 0x20 or greater + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_TEST1</id> <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType> <description> Returns if a chip contains the TEST1 feature. True if either: Centaur EC 10 - Venice EC greater than 30 + Cumulus EC greater than 30 </description> <chipEcFeature> <chip> |