HB Addr Stash chip-op

Change-Id: I6ffd7bedc7c1456839d063429467dccecf1aa826
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34903
Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

13 files changed, 538 insertions, 4 deletions

diff --git a/src/sbefw/sbe_host_intf.H b/src/sbefw/sbe_host_intf.H
index f1e9bd52..378acae0 100644
--- a/src/sbefw/sbe_host_intf.H
+++ b/src/sbefw/sbe_host_intf.H
@@ -99,6 +99,7 @@ enum sbePsuGenericMessages
     SBE_PSU_GENERIC_MSG_SET_FFDC_ADDR      = 0x04,
     SBE_PSU_GENERIC_MSG_QUIESCE            = 0x05,
     SBE_PSU_GENERIC_MSG_SYSTEM_FABRIC_MAP  = 0x06,
+    SBE_PSU_GENERIC_MSG_STASH_MPIPL_CONFIG = 0x07,
     SBE_PSU_GENERIC_MSG_UNKNOWN            = 0xFF,
 };
 
diff --git a/src/sbefw/sbe_sp_intf.H b/src/sbefw/sbe_sp_intf.H
index 315d98d0..7e109dca 100644
--- a/src/sbefw/sbe_sp_intf.H
+++ b/src/sbefw/sbe_sp_intf.H
@@ -215,6 +215,7 @@ enum sbeSecondaryResponse
     SBE_SEC_MEM_REGION_NOT_FOUND              = 0x15,
     SBE_SEC_MAXIMUM_MEM_REGION_EXCEEDED       = 0x16,
     SBE_SEC_MEM_REGION_AMEND_ATTEMPTED        = 0x17,
+    SBE_SEC_INPUT_BUFFER_OVERFLOW             = 0x18,
 };
 
 /**
diff --git a/src/sbefw/sbecmdgeneric.C b/src/sbefw/sbecmdgeneric.C
index bffb67db..6a99199d 100644
--- a/src/sbefw/sbecmdgeneric.C
+++ b/src/sbefw/sbecmdgeneric.C
@@ -277,9 +277,53 @@ uint32_t sbeSetFFDCAddr(uint8_t *i_pArg)
 #undef SBE_FUNC
 }
 
-#endif //__SBEFW_SEEPROM__
+//----------------------------------------------------------------------------
+uint32_t sbeStashKeyAddrPair( uint8_t *i_pArg )
+{
+    #define SBE_FUNC "sbeStashKeyAddrPair"
+    SBE_ENTER(SBE_FUNC);
+    uint32_t rc = SBE_SEC_OPERATION_SUCCESSFUL;
+    uint32_t fapiRc = FAPI2_RC_SUCCESS;
+    do
+    {
+        stashMsg_t l_stashMsg;
+        // Send Ack to Host via SBE_SBE2PSU_DOORBELL_SET_BIT1, once both
+        // key/addr is extracted out of MBOX_REG1 and MBOX_REG2
+        rc = sbeReadPsu2SbeMbxReg(SBE_HOST_PSU_MBOX_REG1,
+                                  (sizeof(stashMsg_t)/sizeof(uint64_t)),
+                                  (uint64_t*)&l_stashMsg, true);
+        if(SBE_SEC_OPERATION_SUCCESSFUL != rc)
+        {
+            SBE_ERROR(SBE_FUNC" Failed to extract "
+                "SBE_HOST_PSU_MBOX_REG1/SBE_HOST_PSU_MBOX_REG2");
+            break;
+        }
+
+        SBE_INFO(SBE_FUNC "Key[0x%08X] Addr[0x%08X %08X]",
+            l_stashMsg.key, SBE::higher32BWord(l_stashMsg.addr),
+            SBE::lower32BWord(l_stashMsg.addr));
+
+        // Update the Key-Addr Pair in local Memory
+        bool update = SBE_GLOBAL->sbeKeyAddrPair.updatePair(l_stashMsg.key,
+                                                            l_stashMsg.addr);
+        if(false == update)
+        {
+            // Update RC to indicate Host that Stash memory is full
+            SBE_GLOBAL->sbeSbe2PsuRespHdr.setStatus(
+                SBE_PRI_GENERIC_EXECUTION_FAILURE,
+                SBE_SEC_INPUT_BUFFER_OVERFLOW);
+            break;
+        }
+    }while(0);
+
+    // Send the response
+    sbePSUSendResponse(SBE_GLOBAL->sbeSbe2PsuRespHdr, fapiRc, rc);
+
+    SBE_EXIT(SBE_FUNC);
+    return rc;
+    #undef SBE_FUNC
+}
 
-#ifndef __SBEFW_SEEPROM__
 //----------------------------------------------------------------------------
 uint32_t sbeSetSystemFabricMap( uint8_t *i_pArg )
 {
@@ -318,7 +362,9 @@ uint32_t sbeSetSystemFabricMap( uint8_t *i_pArg )
     return l_rc;
     #undef SBE_FUNC
 }
+#endif //__SBEFW_SEEPROM__
 
+#ifndef __SBEFW_SEEPROM__
 //----------------------------------------------------------------------------
 uint32_t sbeFifoQuiesce( uint8_t *i_pArg )
 {
diff --git a/src/sbefw/sbecmdgeneric.H b/src/sbefw/sbecmdgeneric.H
index 63f7d104..934d34a6 100644
--- a/src/sbefw/sbecmdgeneric.H
+++ b/src/sbefw/sbecmdgeneric.H
@@ -33,6 +33,65 @@
 #define __SBEFW_SBECMDGENERIC_H
 
 #include <stdint.h>
+#include <p9_sbe_hb_structures.H>
+
+typedef struct sbeStashMemoryPair
+{
+    // This is coming from p9_sbe_hb_structures.H
+    keyAddrPair_t keyValuePairfromHost;
+
+    // Default Constructor to initialize addr/key to 0xFF
+    sbeStashMemoryPair()
+    {
+        for(uint8_t cnt=0; cnt<MAX_ROW_COUNT; cnt++)
+        {
+            keyValuePairfromHost.addr[cnt] = 0xFFFFFFFFFFFFFFFFULL;
+            keyValuePairfromHost.key[cnt] = 0xFF;
+        }
+    }
+
+    bool updatePair(uint8_t key, uint64_t addr)
+    {
+        bool l_return = false;
+        // Check if Key already exist, if yes update addr there
+        for(uint8_t cnt=0; cnt<MAX_ROW_COUNT; cnt++)
+        {
+            if(keyValuePairfromHost.key[cnt] == key)
+            {
+                keyValuePairfromHost.addr[cnt] = addr;
+                l_return = true;
+                break;
+            }
+        }
+        if(false == l_return) // Insert the new key into a free pair
+        {
+            for(uint8_t cnt=0; cnt<MAX_ROW_COUNT; cnt++)
+            {
+                if(keyValuePairfromHost.key[cnt] == 0xFF)
+                {
+                    keyValuePairfromHost.key[cnt] = key;
+                    keyValuePairfromHost.addr[cnt] = addr;
+                    l_return = true;
+                    break;
+                }
+            }
+        }
+        return l_return;
+    }
+
+    uint64_t fetchStashAddrAttribute()
+    {
+        return (uint64_t)((uint8_t*)(&keyValuePairfromHost));
+    }
+}sbeStashMemoryPair_t;
+
+// Message struct to receive the key/addr pair from host
+typedef struct stashMsg
+{
+    uint64_t reserve:56;
+    uint64_t key:8;
+    uint64_t addr;
+}stashMsg_t;
 
 /**
   * @brief retrieve SBE FFDC on request from FSP.  (0xA801)
@@ -88,4 +147,13 @@ uint32_t sbePsuQuiesce(uint8_t *i_pArg);
   */
 uint32_t sbeSetSystemFabricMap(uint8_t *i_pArg);
 
+/**
+  * @brief SBE stash the key addr pair into sbe memory (0xD707)
+  *
+  * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
+  *
+  * @return    Rc from the Psu access utility
+  */
+uint32_t sbeStashKeyAddrPair(uint8_t *i_pArg);
+
 #endif // __SBEFW_SBECMDGENERIC_H
diff --git a/src/sbefw/sbecmdiplcontrol.C b/src/sbefw/sbecmdiplcontrol.C
index b7d376d0..17fcb918 100644
--- a/src/sbefw/sbecmdiplcontrol.C
+++ b/src/sbefw/sbecmdiplcontrol.C
@@ -38,6 +38,8 @@
 #include "sberegaccess.H"
 #include "sbestates.H"
 #include "sbecmdcntrldmt.H"
+#include "sbeglobals.H"
+
 // TODO Workaround
 #include "plat_target_parms.H"
 
@@ -824,12 +826,12 @@ ReturnCode istepWithCoreConditional( sbeIstepHwp_t i_hwp)
 }
 
 //----------------------------------------------------------------------------
-
 ReturnCode istepLoadBootLoader( sbeIstepHwp_t i_hwp)
 {
     ReturnCode rc = FAPI2_RC_SUCCESS;
     // Get master Ex
     uint8_t exId = 0;
+    Target< TARGET_TYPE_SYSTEM > sysTgt;
     Target<TARGET_TYPE_PROC_CHIP > proc = plat_getChipTarget();
     FAPI_ATTR_GET(fapi2::ATTR_MASTER_EX,proc,exId);
     fapi2::Target<fapi2::TARGET_TYPE_EX >
@@ -838,8 +840,12 @@ ReturnCode istepLoadBootLoader( sbeIstepHwp_t i_hwp)
     P9XipHeader *hdr = getXipHdr();
     P9XipSection *hbblSection =  &(hdr->iv_section[P9_XIP_SECTION_SBE_HBBL]);
 
+    // Update the ATTR_SBE_ADDR_KEY_STASH_ADDR before calling the bootloader,
+    // since it is going to access these data from inside.
+    uint64_t addr = SBE_GLOBAL->sbeKeyAddrPair.fetchStashAddrAttribute();
+    FAPI_ATTR_SET(fapi2::ATTR_SBE_ADDR_KEY_STASH_ADDR, sysTgt, addr); 
     SBE_EXEC_HWP(rc, p9_sbe_load_bootloader, proc, exTgt, hbblSection->iv_size,
-                                            getSectionAddr(hbblSection) )
+                 getSectionAddr(hbblSection))
     return rc;
 }
 
diff --git a/src/sbefw/sbecmdiplcontrol.H b/src/sbefw/sbecmdiplcontrol.H
index b5413ec0..d2b21af0 100644
--- a/src/sbefw/sbecmdiplcontrol.H
+++ b/src/sbefw/sbecmdiplcontrol.H
@@ -33,6 +33,8 @@
 #define __SBEFW_SBECMDIPLCONTROL_H
 
 #include <stdint.h>
+#include "sbecmdgeneric.H"
+
 
 namespace fapi2
 {
diff --git a/src/sbefw/sbecmdparser.C b/src/sbefw/sbecmdparser.C
index d87f750a..3736aa1a 100644
--- a/src/sbefw/sbecmdparser.C
+++ b/src/sbefw/sbecmdparser.C
@@ -306,6 +306,11 @@ static sbeCmdStruct_t g_sbePsuGenericCmdArray[] =
      SBE_PSU_GENERIC_MSG_SYSTEM_FABRIC_MAP,
      SBE_NO_FENCE,
     },
+
+    {sbeStashKeyAddrPair,
+     SBE_PSU_GENERIC_MSG_STASH_MPIPL_CONFIG,
+     SBE_NO_FENCE,
+    },
 };
 
 ////////////////////////////////////////////////////////////////
diff --git a/src/sbefw/sbeglobals.H b/src/sbefw/sbeglobals.H
index 37bfa2a9..25eac836 100644
--- a/src/sbefw/sbeglobals.H
+++ b/src/sbefw/sbeglobals.H
@@ -30,6 +30,7 @@
 #include "sbeHostMsg.H"
 #include "sbestates.H"
 #include "sbeexeintf.H"
+#include "sbecmdgeneric.H"
 
 #define SBE_GLOBAL sbeGlobal
 
@@ -79,6 +80,8 @@ class SBEGlobalsSingleton
         sbeHostAddr_t hostPassThroughCmdAddr;
         // ffdc address
         sbeHostAddr_t hostFFDCAddr;
+        // Key Addr Pair
+        sbeStashMemoryPair_t sbeKeyAddrPair;
 
         ////////////////////////////////////////////////////////////////
         //// @brief PkThread structure for SBE Command Receiver thread
diff --git a/src/test/testcases/test.xml b/src/test/testcases/test.xml
index aa4ac22f..9dd18c78 100755
--- a/src/test/testcases/test.xml
+++ b/src/test/testcases/test.xml
@@ -30,7 +30,9 @@
           <testcase>
               <simcmd>p9Proc0.pib_psu->tppsu_tpbr_interrupt_msg_available=[NIL]</simcmd>
           </testcase>
+          <include>../simics/targets/p9_nimbus/sbeTest/testPSUSetStashPair.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testIstep.xml</include>
+          <include>../simics/targets/p9_nimbus/sbeTest/testMatchStashPair.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testScom.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testGeneric.xml</include>
           <!-- Memory access testcases -->
diff --git a/src/test/testcases/testMatchStashPair.py b/src/test/testcases/testMatchStashPair.py
new file mode 100644
index 00000000..95606266
--- /dev/null
+++ b/src/test/testcases/testMatchStashPair.py
@@ -0,0 +1,64 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/test/testcases/testMatchStashPair.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2017
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testUtil
+import testMemUtil
+err = False
+
+data =[0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,
+       0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,
+       0xbb,0xbb,0xbb,0xbb,0xbb,0xbb,0xbb,0xbb,
+       0xcc,0xcc,0xcc,0xcc,0xcc,0xcc,0xcc,0xcc,
+       0xdd,0xdd,0xdd,0xdd,0xdd,0xdd,0xdd,0xdd,
+       0xee,0xee,0xee,0xee,0xee,0xee,0xee,0xee,
+       0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+       0xab,0xab,0xab,0xab,0xab,0xab,0xab,0xab,
+       0xcd,0xcd,0xcd,0xcd,0xcd,0xcd,0xcd,0xcd];
+
+# MAIN Test Run Starts Here...
+#-------------------------------------------------
+def main( ):
+# First Case without Fast Mode without LCO
+    testUtil.runCycles( 10000000 )
+    # Get mem PBA - WO FMODE, WO LCO
+    readData = testMemUtil.getmem(0x08200000, 128, 0x02)[44:][:-12]
+    if(data == readData):
+        print ("Success - Write-Read PBA - WO FMODE, WO LCO")
+    else:
+        print data
+        print readData
+        raise Exception('data mistmach')
+#-------------------------------------------------
+# Calling all test code
+#-------------------------------------------------
+main()
+
+if err:
+    print ("\nTest Suite completed with error(s)")
+    #sys.exit(1)
+else:
+    print ("\nTest Suite completed with no errors")
+    #sys.exit(0);
+
diff --git a/src/test/testcases/testMatchStashPair.xml b/src/test/testcases/testMatchStashPair.xml
new file mode 100755
index 00000000..56e1d0a1
--- /dev/null
+++ b/src/test/testcases/testMatchStashPair.xml
@@ -0,0 +1,30 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/test/testcases/testMatchStashPair.xml $                   -->
+<!--                                                                        -->
+<!-- OpenPOWER sbe Project                                                  -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2017                             -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<?xml version="1.0" encoding="UTF-8"?>
+
+      <testcase>
+          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testMatchStashPair.py</simcmd>
+          <exitonerror>yes</exitonerror>
+      </testcase>
+
diff --git a/src/test/testcases/testPSUSetStashPair.py b/src/test/testcases/testPSUSetStashPair.py
new file mode 100644
index 00000000..378b101c
--- /dev/null
+++ b/src/test/testcases/testPSUSetStashPair.py
@@ -0,0 +1,276 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/test/testcases/testPSUSetStashPair.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2017
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+
+import sys
+import os
+import struct
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testPSUUtil
+import testRegistry as reg
+import testUtil
+
+#-------------------------------
+# This  is a Test Expected Data
+#-------------------------------
+'''
+This data are the values or strings that needs to be validated for the test.
+'''
+'''
+#------------------------------------------------------------------------------------------------------------------------------
+# SBE side test data -
+#------------------------------------------------------------------------------------------------------------------------------
+'''
+sbe_test_data1 = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        Stash CMD
+    ["write", reg.REG_MBOX0, "0000010000F0D707", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    #                        Stash CMD key
+    ["write", reg.REG_MBOX1, "0000000000000001", 	 8, 	"None", 		"Writing to MBOX1 address"],
+    #                        Stash Addr
+    ["write", reg.REG_MBOX2, "AAAAAAAAAAAAAAAA", 	 8, 	"None", 			"Writing to MBOX2 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+'''
+sbe_test_data2 = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        Stash CMD
+    ["write", reg.REG_MBOX0, "0000010000F0D707", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    #                        Stash CMD key
+    ["write", reg.REG_MBOX1, "0000000000000002", 	 8, 	"None", 		"Writing to MBOX1 address"],
+    #                        Stash Addr
+    ["write", reg.REG_MBOX2, "BBBBBBBBBBBBBBBB", 	 8, 	"None", 			"Writing to MBOX2 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+'''
+sbe_test_data3 = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        Stash CMD
+    ["write", reg.REG_MBOX0, "0000010000F0D707", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    #                        Stash CMD key
+    ["write", reg.REG_MBOX1, "0000000000000003", 	 8, 	"None", 		"Writing to MBOX1 address"],
+    #                        Stash Addr
+    ["write", reg.REG_MBOX2, "CCCCCCCCCCCCCCCC", 	 8, 	"None", 			"Writing to MBOX2 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+'''
+sbe_test_data4 = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        Stash CMD
+    ["write", reg.REG_MBOX0, "0000010000F0D707", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    #                        Stash CMD key
+    ["write", reg.REG_MBOX1, "0000000000000004", 	 8, 	"None", 		"Writing to MBOX1 address"],
+    #                        Stash Addr
+    ["write", reg.REG_MBOX2, "DDDDDDDDDDDDDDDD", 	 8, 	"None", 			"Writing to MBOX2 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+'''
+sbe_test_data5 = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        Stash CMD
+    ["write", reg.REG_MBOX0, "0000010000F0D707", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    #                        Stash CMD key
+    ["write", reg.REG_MBOX1, "0000000000000005", 	 8, 	"None", 		"Writing to MBOX1 address"],
+    #                        Stash Addr
+    ["write", reg.REG_MBOX2, "EEEEEEEEEEEEEEEE", 	 8, 	"None", 			"Writing to MBOX2 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+'''
+sbe_test_data6 = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        Stash CMD
+    ["write", reg.REG_MBOX0, "0000010000F0D707", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    #                        Stash CMD key
+    ["write", reg.REG_MBOX1, "0000000000000006", 	 8, 	"None", 		"Writing to MBOX1 address"],
+    #                        Stash Addr
+    ["write", reg.REG_MBOX2, "FFFFFFFFFFFFFFFF", 	 8, 	"None", 			"Writing to MBOX2 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+'''
+sbe_test_data7 = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        Stash CMD
+    ["write", reg.REG_MBOX0, "0000010000F0D707", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    #                        Stash CMD key
+    ["write", reg.REG_MBOX1, "0000000000000007", 	 8, 	"None", 		"Writing to MBOX1 address"],
+    #                        Stash Addr
+    ["write", reg.REG_MBOX2, "ABABABABABABABAB", 	 8, 	"None", 			"Writing to MBOX2 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+'''
+sbe_test_data8 = (
+    #-----------------------------------------------------------------------------------------------------
+    #   OP      Reg                               ValueToWrite         size    Test Expected Data       Description
+    #-----------------------------------------------------------------------------------------------------
+    #                        Stash CMD
+    ["write", reg.REG_MBOX0, "0000010000F0D707", 	 8, 	"None", 		"Writing to MBOX0 address"],
+    #                        Stash CMD key
+    ["write", reg.REG_MBOX1, "0000000000000008", 	 8, 	"None", 		"Writing to MBOX1 address"],
+    #                        Stash Addr
+    ["write", reg.REG_MBOX2, "CDCDCDCDCDCDCDCD", 	 8, 	"None", 			"Writing to MBOX2 address"],
+    ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 	 8, 	"None", 		"Update SBE Doorbell register to interrupt SBE"],
+    )
+'''
+#---------------------
+# Host side test data - SUCCESS
+#---------------------
+'''
+host_test_data_success = (
+    #----------------------------------------------------------------------------------------------------------------
+    #   OP     Reg                                 ValueToWrite        size    Test Expected Data        Description
+    #----------------------------------------------------------------------------------------------------------------
+    ["read", reg.REG_MBOX4, 		"0", 	 	 8, 	"0000000000F0D707", "Reading Host MBOX4 data to Validate"],
+    )
+
+'''
+#-----------------------------------------------------------------------
+# Do not modify - Used to simulate interrupt on Ringing Doorbell on Host
+#-----------------------------------------------------------------------
+'''
+host_polling_data = (
+    #----------------------------------------------------------------------------------------------------------------
+    #   OP     Reg                                 ValueToWrite        size    Test Expected Data           Description
+    #----------------------------------------------------------------------------------------------------------------
+    ["read", reg.PSU_HOST_DOORBELL_REG_WO_OR, 		"0", 		8, 	"8000000000000000", "Reading Host Doorbell for Interrupt"],
+    )
+
+#-------------------------
+# Main Function
+#-------------------------
+def main():
+    # Run Simics initially
+    testUtil.runCycles( 100000000 );
+    # Intialize the class obj instances
+    regObj = testPSUUtil.registry() # Registry obj def for operation
+
+    print "\n  Execute SBE Test \n"
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data1 )
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+    testUtil.runCycles( 10000000 );
+
+    print "\n  Execute SBE Test \n"
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data2 )
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+    testUtil.runCycles( 10000000 );
+
+    print "\n  Execute SBE Test \n"
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data3 )
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+    testUtil.runCycles( 10000000 );
+
+    print "\n  Execute SBE Test \n"
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data4 )
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+    testUtil.runCycles( 10000000 );
+
+    print "\n  Execute SBE Test \n"
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data5 )
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+    testUtil.runCycles( 10000000 );
+
+    print "\n  Execute SBE Test \n"
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data6 )
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+    testUtil.runCycles( 10000000 );
+
+    print "\n  Execute SBE Test \n"
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data7 )
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+    testUtil.runCycles( 10000000 );
+
+    print "\n  Execute SBE Test \n"
+    # HOST->SBE data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data8 )
+    print "\n  Poll on Host side for INTR  ...\n"
+    #Poll on HOST DoorBell Register for interrupt
+    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+    #SBE->HOST data set execution
+    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+    testUtil.runCycles( 10000000 );
+
+if __name__ == "__main__":
+    main()
+    if err:
+    	print ( "\nTest Suite completed with error(s)" )
+    	#sys.exit(1)
+    else:
+    	print ( "\nTest Suite completed with no errors" )
+	#sys.exit(0);
+
+
diff --git a/src/test/testcases/testPSUSetStashPair.xml b/src/test/testcases/testPSUSetStashPair.xml
new file mode 100755
index 00000000..36ae7c9f
--- /dev/null
+++ b/src/test/testcases/testPSUSetStashPair.xml
@@ -0,0 +1,30 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/test/testcases/testPSUSetStashPair.xml $                  -->
+<!--                                                                        -->
+<!-- OpenPOWER sbe Project                                                  -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2017                             -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<?xml version="1.0" encoding="UTF-8"?>
+
+      <testcase>
+          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testPSUSetStashPair.py</simcmd>
+          <exitonerror>yes</exitonerror>
+      </testcase>
+