WOF: VRM timing, WOF and VDM enblement attributes additions

Change-Id: I1ff55edf512f1a3ec4b6b1c1773726e31ae2e611
RTC:169800
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38207
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38309
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

1 files changed, 130 insertions, 1 deletions

diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
index e865152f..54d4ab33 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
@@ -43,7 +43,7 @@
 
       Provided by the Machine Readable Workbook after system characterization.
     </description>
-    <valueType>uint8</valueType>
+    <valueType>uint32</valueType>
     <platInit/>
   </attribute>
   <!-- ********************************************************************* -->
@@ -64,7 +64,90 @@
   </attribute>
   <!-- ********************************************************************* -->
   <attribute>
+    <id>ATTR_EXTERNAL_VRM_TRANSITION_START_NS</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Delay (binary in nanoseconds) from the time the VRM receives the write
+    voltage command until the voltage actually moves.   This value is used for
+    both increasing and decreasing transitions as part of the overall voltage
+    transition time calculation.
+    Firmware provides a default value of 8000ns (eg 8us)) if this attribute is
+    zero.  Note: the smallest possible delay is limited to 1ns.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <initToZero/>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_EXTERNAL_VRM_TRANSITION_RATE_INC_UV_PER_US</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Transition rate (binary in microVolts per microsecond) of the VRM for an
+    increasing voltage transition.   This is used as part of the overall voltage
+    transition time calculation
+    Firmware provides a default value of 10000 uV/us (eg 10mV/us) if this
+    attribute is zero.  Note: the fastest possible rate is limited to 1uV/us.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <initToZero/>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_EXTERNAL_VRM_TRANSITION_RATE_DEC_UV_PER_US</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Transition rate (binary in microVolts per microsecond) of the VRM for an
+    decreasing voltage transition.   This is used as part of the overall voltage
+    transition time calculation
+    Firmware provides a default value of 10000 uV/us (eg 10mV/us) if this
+    attribute is zero. Note: the fastest possible rate is limited to 1uV/us.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <initToZero/>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_EXTERNAL_VRM_TRANSITION_STABILIZATION_TIME_NS</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Time (binary in nanoseconds) to allow the voltage rail to stabilize before
+    considering the transition to be fully complete.  This value is used for
+    both increasing and decreasing transitions as part of the overall voltage
+    transition time calculation.
+    Firmware provides a default value of 5000ns (5us) if this attribute is zero.
+    Note: the smallest delay is limited to 1ns.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <initToZero/>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
     <id>ATTR_AVSBUS_FREQUENCY</id>
+
     <targetType>TARGET_TYPE_SYSTEM</targetType>
     <!-- <<<<<<< PROC_CHIP POSSIBLE -->
     <description>
@@ -834,6 +917,52 @@
   </attribute>
   <!-- ********************************************************************* -->
   <attribute>
+    <id>ATTR_WOF_ENABLE_FRATIO</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    If wof_enabled, defines the Frequency Ratio calculation performed.
+    (THIS IS NOT SUPPORTED IN P9 GA1!).
+    </description>
+    <valueType>uint8</valueType>
+    <enum>FIXED=0, STEPPED=1</enum>
+    <platInit/>
+    <initToZero/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_WOF_ENABLE_VRATIO</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    If wof_enabled, defines the Voltage Ratio calculation performed.
+    THIS IS NOT SUPPORTED AT PRESENT. GA1 SUPPORT IS TBD).
+    </description>
+    <valueType>uint8</valueType>
+    <enum>FIXED=0, STEPPED=1</enum>
+    <platInit/>
+    <initToZero/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_WOF_VRATIO_SELECT</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    If wof_enabled AND ATTR_WOF_ENABLE_VRATIO = CALCULATED, this attribute
+    selects the Vratio calculation type.
+    ACTIVE_CORES: Vratio is the number of active cores to the
+    number of good cores
+    FULL: Vratio is Vaverage to Vclip(Fclip) where Vclip(Fclip) is
+    the normal interpolated regulator voltage (including load line uplife @ RDP
+    current) derated with presently measured Idd current (from the AVSBus) and
+    the loadline.
+
+    </description>
+    <valueType>uint8</valueType>
+    <enum>ACTIVE_CORES=0, FULL=1</enum>
+    <platInit/>
+    <initToZero/>
+  </attribute>
+
+  <attribute>
     <id>ATTR_PBAX_GROUPID</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>