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author | Luke Murray <murrayl@us.ibm.com> | 2017-04-20 10:46:26 -0500 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-04-28 12:16:26 -0400 |
commit | a12e580276f05d9d061c9be6ce35e4502f8bce39 (patch) | |
tree | 389823dd2aacdbe45123f08cb988fcbc4fa45227 | |
parent | 7618758ce851d7211d7368ec29445e580e15c45c (diff) | |
download | talos-sbe-a12e580276f05d9d061c9be6ce35e4502f8bce39.tar.gz talos-sbe-a12e580276f05d9d061c9be6ce35e4502f8bce39.zip |
Disable cp_me from the L3 for Nimbus DD1 and DD2.0.
By default the L3 only sends these when the addres is non-local.
This is needed for the MCU to send early data. However MCU early
data is broken in DD1 and DD2.0 and this eats up X-link bandwidth,
so for DD1 and DD2.0 we're disabling cp_me from the L3.
Change-Id: I13a894f91434cc19f5f9502f54cc59bad9a0ae0f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39483
Reviewed-by: ALEXANDER M. TAFT <amtaft@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39505
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index f5a4d9bc..4519c228 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -1999,6 +1999,23 @@ </attribute> <!-- ******************************************************************** --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_DISABLE_CP_ME</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Disable cp_me from the L3 for Nimbus DD1 and DD2.0 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_OPTIMAL_LARX_STCX_PERF</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> |