Update backing build

Change-Id: I515092747bc074344ce7836a8398f3b19c4198a4
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32049
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>

7 files changed, 47 insertions, 48 deletions

diff --git a/customrc b/customrc
index ee11c6ae..373166cc 100755
--- a/customrc
+++ b/customrc
@@ -33,6 +33,6 @@ export SANDBOXNAME=test_sb
 #export WORKSPACE=<set it to your root ppe directory. This is required if you
 #                  to use build script locally>
 export MACHINE=NIMBUS
-export BACKING_BUILD=/esw/fips910/Builds/b1017a_1644.910/
+export BACKING_BUILD=/esw/fips910/Builds/b1031a_1646.910/
 export SIMICSOPTIONS="-nre"
 
diff --git a/src/test/framework/etc/workarounds.postsimsetup b/src/test/framework/etc/workarounds.postsimsetup
index 0d29a9e0..ac7f3a29 100755
--- a/src/test/framework/etc/workarounds.postsimsetup
+++ b/src/test/framework/etc/workarounds.postsimsetup
@@ -42,6 +42,3 @@ mkdir -p $SANDBOXBASE/obj/ppc/simu/scripts/hbfw
 cp $BACKING_BUILD/obj/ppc/simu/scripts/hbfw/standalone.simics $SANDBOXBASE/obj/ppc/simu/scripts/hbfw
 patch -p0 $SANDBOXBASE/obj/ppc/simu/scripts/hbfw/standalone.simics $SBEROOT/src/test/framework/etc/patches/standalone.simics.patch
 
-# patch for magic instruction
-mkdir -p $SANDBOXBASE/imics/linux64/lib/
-cp -f /esw/san2/sgupta2m/MagicPatch/ppe.so  $SANDBOXBASE/simics/linux64/lib/
diff --git a/src/test/framework/etc/workarounds.presimsetup b/src/test/framework/etc/workarounds.presimsetup
index f65915ed..6167c7ed 100755
--- a/src/test/framework/etc/workarounds.presimsetup
+++ b/src/test/framework/etc/workarounds.presimsetup
@@ -26,8 +26,6 @@
 
 #### Examples ####
 #echo "+++ Some message about why you need to do this."
-mkdir -p $sb/simu/data/cec-chip
 #egrep -v "WSALIAS DEFAULT FIPSLEVEL|WSALIAS DEFAULT SIMICSLEVEL" $BACKING_BUILD/src/simu/data/simicsInfo > $sb/simu/data/simicsInfo
 #echo "WSALIAS DEFAULT FIPSLEVEL env/gfwb/simics-4.2.0/simics-4.2.83/fips/fld36/fi120201a700.42" >> $sb/simu/data/simicsInfo
 #echo "WSALIAS DEFAULT SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.83/bin" >> $sb/simu/data/simicsInfo
-cp /esw/user/nfs/prasrang/p9n.act $sb/simu/data/cec-chip
diff --git a/src/test/testcases/test.xml b/src/test/testcases/test.xml
index 216b7ac5..c3f09f32 100755
--- a/src/test/testcases/test.xml
+++ b/src/test/testcases/test.xml
@@ -39,6 +39,7 @@
           <include>../simics/targets/p9_nimbus/sbeTest/testRegAccess.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testFifoReset.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testAduMem.xml</include>
+          <include>../simics/targets/p9_nimbus/sbeTest/testStopClocks.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testExecutorPutRing.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testSystemFabricMap.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testGetRing.xml</include>
diff --git a/src/test/testcases/testExecutorPutRing.py b/src/test/testcases/testExecutorPutRing.py
index 604dee85..db5f8769 100644
--- a/src/test/testcases/testExecutorPutRing.py
+++ b/src/test/testcases/testExecutorPutRing.py
@@ -158,34 +158,36 @@ def main():
     #SBE->HOST data set execution
     regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
 
-    print "\n  Execute SBE Test set2  [ Put Ring ] ...\n"
-    '''
-    Test Case 2
-    '''
-    # HOST->SBE data set execution
-    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data2 )
-
-    print "\n  Poll on Host side for INTR  ...\n"
-    #Poll on HOST DoorBell Register for interrupt
-    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
-
-    #SBE->HOST data set execution
-    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
-
-    print "\n  Execute SBE Test set3 [ Put Ring ] ...\n"
-    '''
-    Test Case 3
-    '''
-    # HOST->SBE data set execution
-    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data3 )
-
-    print "\n  Poll on Host side for INTR  ...\n"
-    #Poll on HOST DoorBell Register for interrupt
-    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
-
-    #SBE->HOST data set execution
-    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
-
+#   Commenting out test cases for perv and proc chiplets, as there is no
+#   way to stop cloks for these chiplets from the test framework
+#    print "\n  Execute SBE Test set2  [ Put Ring ] ...\n"
+#    '''
+#    Test Case 2
+#    '''
+#    # HOST->SBE data set execution
+#    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data2 )
+#
+#    print "\n  Poll on Host side for INTR  ...\n"
+#    #Poll on HOST DoorBell Register for interrupt
+#    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+#
+#    #SBE->HOST data set execution
+#    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+#
+#    print "\n  Execute SBE Test set3 [ Put Ring ] ...\n"
+#    '''
+#    Test Case 3
+#    '''
+#    # HOST->SBE data set execution
+#    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data3 )
+#
+#    print "\n  Poll on Host side for INTR  ...\n"
+#    #Poll on HOST DoorBell Register for interrupt
+#    regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 )
+#
+#    #SBE->HOST data set execution
+#    regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success )
+#
     print "\n  Execute SBE Test set4  [ Put Ring ] ...\n"
     '''
     Test Case 4
diff --git a/src/test/testcases/testPutMem.py b/src/test/testcases/testPutMem.py
index 70996247..6fb0c937 100644
--- a/src/test/testcases/testPutMem.py
+++ b/src/test/testcases/testPutMem.py
@@ -46,7 +46,7 @@ PUTMEM_TEST_HDR_W_FMODE_WO_LCO =  [0,0,0,0x86,
 
 PUTMEM_TEST_HDR_W_FMODE_W_LCO =  [0,0,0,0x86,
                                   0,0,0xA4,0x02,
-                                  0x2E,0,0x0,0x62,
+                                  0x20,0,0x0,0x62,
                                   0,0,0,0,
                                   0x08,0x00,0x00,0x00,
                                   0x00,0x00,0x00,0x80]
diff --git a/src/test/testcases/testStopClocks.py b/src/test/testcases/testStopClocks.py
index d81fdd37..98bf8d72 100644
--- a/src/test/testcases/testStopClocks.py
+++ b/src/test/testcases/testStopClocks.py
@@ -6,6 +6,7 @@
 # OpenPOWER sbe Project
 #
 # Contributors Listed Below - COPYRIGHT 2016
+# [+] International Business Machines Corp.
 #
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -63,25 +64,25 @@ def main( ):
     testUtil.runCycles( 10000000 )
     testUtil.readEot( )
 
-    testUtil.writeUsFifo( STOPCLOCK_ALL_CORE_TESTDATA )
-    testUtil.writeEot( )
-    testUtil.readDsFifo( STOPCLOCK_CORE_EXPDATA )
-    testUtil.runCycles( 10000000 )
-    testUtil.readEot( )
-
+#    testUtil.writeUsFifo( STOPCLOCK_ALL_CORE_TESTDATA )
+#    testUtil.writeEot( )
+#    testUtil.readDsFifo( STOPCLOCK_CORE_EXPDATA )
+#    testUtil.runCycles( 10000000 )
+#    testUtil.readEot( )
+#
     testUtil.runCycles( 10000000 )
     testUtil.writeUsFifo( STOPCLOCK_EQ_TESTDATA )
     testUtil.writeEot( )
     testUtil.readDsFifo( STOPCLOCK_EQ_EXPDATA )
     testUtil.runCycles( 10000000 )
     testUtil.readEot( )
-
-    testUtil.runCycles( 10000000 )
-    testUtil.writeUsFifo( STOPCLOCK_ALL_EQ_TESTDATA )
-    testUtil.writeEot( )
-    testUtil.readDsFifo( STOPCLOCK_EQ_EXPDATA )
-    testUtil.runCycles( 10000000 )
-    testUtil.readEot( )
+#
+#    testUtil.runCycles( 10000000 )
+#    testUtil.writeUsFifo( STOPCLOCK_ALL_EQ_TESTDATA )
+#    testUtil.writeEot( )
+#    testUtil.readDsFifo( STOPCLOCK_EQ_EXPDATA )
+#    testUtil.runCycles( 10000000 )
+#    testUtil.readEot( )
 
 #-------------------------------------------------
 # Calling all test code