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authorJoe McGill <jmcgill@us.ibm.com>2017-10-11 16:39:48 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2017-10-14 20:51:32 -0400
commit85c6e9b232369e30f93eefaf4aae2c2db0732495 (patch)
treeef3de9cd33c977e2db5bb8f6a08fecc83494eed8
parent8fd72f79c9f01751110b749f3ba4705c043ef326 (diff)
downloadtalos-sbe-85c6e9b232369e30f93eefaf4aae2c2db0732495.tar.gz
talos-sbe-85c6e9b232369e30f93eefaf4aae2c2db0732495.zip
PLL updates for filter BG, BW including OBUS tank coreqs
p9.filter.pll.scan.initfile adjust BG offset to -1 for P9n DD2.[12], P9c DD1.1 apply BW updates to P9n DD2.2, P9c DD1.[01] p9.obus.pll.scan.initfile apply BW updates to P9n DD2.2, P9c DD1.[01] with tests 108, 109, 110 p9_frequency_buckets: default Cumulus OBUS bucket 0 to 25.625gbs chip_ec_attributes.xml add feature attributes for BG, BW controls Change-Id: I5e06da5267db70bb1d6e6eae066611577d32ac7b CQ: HW423532 CQ: HW423535 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48267 Reviewed-by: Ann C. Wu <annchen@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48269 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r--src/import/chips/p9/common/include/p9_frequency_buckets.H2
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml51
2 files changed, 50 insertions, 3 deletions
diff --git a/src/import/chips/p9/common/include/p9_frequency_buckets.H b/src/import/chips/p9/common/include/p9_frequency_buckets.H
index d05afba3..39c84bc7 100644
--- a/src/import/chips/p9/common/include/p9_frequency_buckets.H
+++ b/src/import/chips/p9/common/include/p9_frequency_buckets.H
@@ -101,7 +101,7 @@ const uint32_t OBUS_PLL_FREQ_LIST_P9N_22[OBUS_PLL_FREQ_BUCKETS] =
const uint32_t OBUS_PLL_FREQ_LIST_P9C_10[OBUS_PLL_FREQ_BUCKETS] =
{
- 1611,
+ 1601,
1250,
1611
};
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 734baefc..7d8f8c37 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -308,8 +308,7 @@
<id>ATTR_CHIP_EC_FEATURE_HW407180</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
- Filter pll setting differences.
- Cumulus matches nimbus dd2.
+ Apply Nimbus DD1 specific filter PLL settings
</description>
<chipEcFeature>
<chip>
@@ -323,6 +322,54 @@
</attribute>
<!-- ******************************************************************** -->
<attribute>
+ <id>ATTR_CHIP_EC_FEATURE_HW423532</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Apply bgoffset m1 to filter PLLs
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_NIMBUS</name>
+ <ec>
+ <value>0x21</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ <chip>
+ <name>ENUM_ATTR_NAME_CUMULUS</name>
+ <ec>
+ <value>0x11</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+ <!-- ******************************************************************** -->
+ <attribute>
+ <id>ATTR_CHIP_EC_FEATURE_HW423535</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Apply bandwidth updates to filter PLLs + OBUS Tank PLL
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_NIMBUS</name>
+ <ec>
+ <value>0x22</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ <chip>
+ <name>ENUM_ATTR_NAME_CUMULUS</name>
+ <ec>
+ <value>0x10</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+ <!-- ******************************************************************** -->
+ <attribute>
<id>ATTR_CHIP_EC_FEATURE_HW365079</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
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