Add debug params to exp_check_for_ready_wrap

  Add parameters to specify number of attempts and delay between attempts
  for EXP_FW_STATUS commands

Change-Id: I55ea4e8d04b0e8644fd5dc1724c2205f24bfc498
Original-Change-Id: I61e664d58352f392e176e132a7161d302d69c619
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76752
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>

1 files changed, 47 insertions, 0 deletions

diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H
index 2afce077..f1955edd 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H
@@ -43,6 +43,7 @@
 #include <lib/i2c/exp_i2c_fields.H>
 #include <generic/memory/lib/utils/pos.H>
 #include <generic/memory/lib/utils/endian_utils.H>
+#include <generic/memory/lib/utils/poll.H>
 
 namespace mss
 {
@@ -187,6 +188,52 @@ inline fapi2::ReturnCode is_ready(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CH
 }
 
 ///
+/// @brief Helper function for exp_check_for_ready
+/// @param[in] i_target the controller
+/// @param[in] i_poll_count the number of times to run the fw_status command (default = 50)
+/// @param[in] i_delay delay in ns between fw_status command attempts (default = 200ns)
+/// @return FAPI2_RC_SUCCESS iff ok
+///
+inline fapi2::ReturnCode exp_check_for_ready_helper(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target,
+        const uint64_t i_poll_count = DEFAULT_POLL_LIMIT,
+        const uint64_t i_delay = 200)
+{
+    // Using using default parameters from class, with overrides for delay and poll_count
+    mss::poll_parameters l_poll_params(DELAY_10NS,
+                                       200,
+                                       i_delay,
+                                       200,
+                                       i_poll_count);
+
+    // From MSCC explorer firmware arch spec
+    // 4.1.5: After power-up, the Explorer Chip will respond with NACK to all incoming I2C requests
+    // from the HOST until the I2C slave interface is ready to receive commands.
+    FAPI_ASSERT( mss::poll(i_target, l_poll_params, [i_target]()->bool
+    {
+        return mss::exp::i2c::is_ready(i_target) == fapi2::FAPI2_RC_SUCCESS;
+    }),
+    fapi2::MSS_EXP_I2C_POLLING_TIMEOUT().
+    set_TARGET(i_target),
+    "Failed to see an ACK from I2C -- polling timeout on %s",
+    mss::c_str(i_target) );
+
+    // We send the EXP_FW_STATUS command as a sanity check to see if it returns SUCCESS
+    FAPI_ASSERT( mss::poll(i_target, l_poll_params, [i_target]()->bool
+    {
+        return mss::exp::i2c::fw_status(i_target) == fapi2::FAPI2_RC_SUCCESS;
+    }),
+    fapi2::MSS_EXP_STATUS_POLLING_TIMEOUT().
+    set_TARGET(i_target),
+    "Failed to see a successful return code -- polling timeout on %s",
+    mss::c_str(i_target) );
+
+    return fapi2::FAPI2_RC_SUCCESS;
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
 /// @brief Perform a register write operation on the given OCMB chip
 /// @param[in] i_target the OCMB target
 /// @param[in] i_addr   The translated address on the OCMB chip