summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorThi Tran <thi@us.ibm.com>2017-03-09 16:18:24 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2017-03-10 11:11:43 -0500
commit8302ffa6cae2e0a1c31e9411230e544f76756817 (patch)
tree2d83c3f0b185f6fe109543bddaf989e1cf8960c7
parent1e79b66c4ec5d416bfb31ff78f62dd712842727e (diff)
downloadtalos-sbe-8302ffa6cae2e0a1c31e9411230e544f76756817.tar.gz
talos-sbe-8302ffa6cae2e0a1c31e9411230e544f76756817.zip
Add ec_abst ring to p9n.hw_image
Change-Id: Ic6fc899956e0690f75224471917ff904aa03713e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37768 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37773 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml17
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml4
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.C3
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.H7
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ring_id.h6
5 files changed, 34 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index d065b2b9..92b60817 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -2266,6 +2266,23 @@
</chipEcFeature>
</attribute>
+ <attribute>
+ <id>ATTR_CHIP_EC_FEATURE_NDD1_ABIST_PARALLEL</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Nimbus DD1: set ABIST engines to PARALLEL mode.
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_NIMBUS</name>
+ <ec>
+ <value>0x20</value>
+ <test>LESS_THAN</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+
<!-- ******************************************************************** -->
<!-- Memory Section -->
<!-- ******************************************************************** -->
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
index 718bcab1..0cfe4c8e 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
@@ -365,6 +365,10 @@ attribute tank
<name>ATTR_CHIP_EC_FEATURE_RING_SAVE_MPIPL</name>
<virtual/>
</entry>
+ <entry>
+ <name>ATTR_CHIP_EC_FEATURE_NDD1_ABIST_PARALLEL</name>
+ <virtual/>
+ </entry>
<entry>
<name>ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET</name>
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.C b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
index 5bcbe432..983653d0 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
@@ -420,10 +420,11 @@ const GenRingIdList RING_ID_LIST_COMMON[] =
{ "ec_gptr" , 0x01, 0x20, 0x20, EKB_RING , 0x20037002},
{ "ec_time" , 0x02, 0x20, 0x20, VPD_RING , 0x20037007},
{ "ec_mode" , 0x03, 0x20, 0x20, EKB_RING , 0x20037001},
+ { "ec_abst" , 0x04, 0x20, 0x20, EKB_RING , 0x20037005},
};
const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
- { "ec_repr" , 0x04, 0x20, 0x37, VPD_RING , 0x20037006},
+ { "ec_repr" , 0x05, 0x20, 0x37, VPD_RING , 0x20037006},
};
const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, CC, RL };
};
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
index a064723c..d8d595f4 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
@@ -779,6 +779,7 @@ enum RingOffset
eq_ana_mode = 45,
ex_l2_fure_1 = 46,
ex_l3_fure_1 = 47,
+
// Instance Rings
eq_repr = (0 | INSTANCE_RING_MARK),
ex_l3_repr = (1 | INSTANCE_RING_MARK),
@@ -812,6 +813,7 @@ enum RingOffset
ec_gptr = 1,
ec_time = 2,
ec_mode = 3,
+ ec_abst = 4,
// Instance Rings
ec_repr = (0 | INSTANCE_RING_MARK)
};
@@ -819,7 +821,7 @@ enum RingOffset
static const CHIPLET_DATA g_ecData =
{
32, // Core Chiplet ID range is 32-55. The base ID is 32.
- 4, // 4 common rings for Core chiplet
+ 5, // 5 common rings for Core chiplet
1, // 1 instance specific ring for each Core chiplet
1
};
@@ -1079,6 +1081,8 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{ EC::ec_repr , "ec_repr" , EC_TYPE }, // 228
{ EQ::ex_l2_fure_1 , "ex_l2_fure_1" , EQ_TYPE }, // 229
{ EQ::ex_l3_fure_1 , "ex_l3_fure_1" , EQ_TYPE }, // 230
+ { EC::ec_abst , "ec_abst" , EC_TYPE }, // 231
+
};
#endif
#ifdef __PPE__
@@ -1315,6 +1319,7 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{ EC::ec_repr , EC_TYPE }, // 228
{ EQ::ex_l2_fure_1 , EQ_TYPE }, // 229
{ EQ::ex_l3_fure_1 , EQ_TYPE }, // 230
+ { EC::ec_abst , EC_TYPE }, // 231
};
#endif
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_id.h b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
index c4ec706b..1eea5f05 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -324,6 +324,10 @@ enum RingID
ex_l2_fure_1 = 229,
ex_l3_fure_1 = 230,
+ // Core Chiplet Rings
+ // ABIST engine mode
+ ec_abst = 231,
+
//***************************
// Rings needed for SBE - End
//***************************
OpenPOWER on IntegriCloud