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| author | Joe McGill <jmcgill@us.ibm.com> | 2019-02-12 08:36:30 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2019-02-13 21:37:14 -0600 |
| commit | 81642d21704f036a8bfebb67e1b99b61da8c142c (patch) | |
| tree | d9bb65d37533ac8193fad83b3d1a007ca03d2be9 | |
| parent | 0f9a51d0059ecf66951a0d07fb43f0e10094277d (diff) | |
| download | talos-sbe-81642d21704f036a8bfebb67e1b99b61da8c142c.tar.gz talos-sbe-81642d21704f036a8bfebb67e1b99b61da8c142c.zip | |
whitelist update for ABUS CCM
68241 added code to clear the DL syndrome capture latches, but omitted adding
these registers to the SBE whitelist
Change-Id: Iceb4d314b264a33aefda76edfa70212c78b9630d
CQ: SW456526
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71733
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71749
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
| -rw-r--r-- | src/import/chips/p9/security/p9_security_white_black_list.csv | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/import/chips/p9/security/p9_security_white_black_list.csv b/src/import/chips/p9/security/p9_security_white_black_list.csv index 91dbf001..58033bb7 100644 --- a/src/import/chips/p9/security/p9_security_white_black_list.csv +++ b/src/import/chips/p9/security/p9_security_white_black_list.csv @@ -211,6 +211,8 @@ Version,Chiplet,Base Address,Chiplet Id - range,Bit Mask,User,Register Name,Desc ,OBUS,0000000009010816,0x09-0x0C,,HWSV,PowerBus OLL Link0 Error Status register,,write_whitelist, ,OBUS,0000000009010817,0x09-0x0C,,HWSV,PowerBus OLL Link1 Error Status register,,write_whitelist, ,OBUS,000000000901081A,0x09-0x0C,,HWSV,PowerBus OLL Retrain Threshold register,,write_whitelist, +,OBUS,0000000009010822,0x09-0x0C,,HWSV,PowerBus OLL Link0 Syndrome Capture register,,write_whitelist, +,OBUS,0000000009010823,0x09-0x0C,,HWSV,PowerBus OLL Link1 Syndrome Capture register,,write_whitelist, ,OBUS,0000000009011050,0x09-0x0C,,HWSV,PPE External Interface XCR register,,write_whitelist, ,OBUS,8000080009010C3F,0x09-0x0C,,HWSV,rx(tx)_lane_ana_pdwn rx_lane_dig_pdwn and rx_lane_disabled,,write_whitelist, ,Core,0000000020010A9C,0x20-0x37,,HB,Direct injects into logic - no latches!!,,write_whitelist, |
