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| author | Joe McGill <jmcgill@us.ibm.com> | 2018-02-28 16:10:20 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-03-07 03:37:41 -0500 |
| commit | 4d30a3d9b2616908a5a847daea87f4593671b215 (patch) | |
| tree | 245997323325a16baa716040ae77935081e380c8 | |
| parent | 8e9d92bf3c8fc86ad2885db215ac9e87dcb6dceb (diff) | |
| download | talos-sbe-4d30a3d9b2616908a5a847daea87f4593671b215.tar.gz talos-sbe-4d30a3d9b2616908a5a847daea87f4593671b215.zip | |
p9_sbe_tracearray -- satsify PRD calls to manage core trace arrays
As a carryover from prior projects, PRD code currently contains logic which
attempts to restart the core trace arrays (via the SBE HWP) after processing
a recoverable error emitted from the core.
The current HWP flags an error in this case (indicating that the core
trace arrays are not SCOM retrievable, which is true for all levels of p9).
This generates a customer visible error log with a FW type callout, which
is undesirable.
This patch is intended to satisfy the current PRD call which intends to reset
and start the core traces, without triggering the check mentioned above or
attempting to access non-implemented SCOM registers.
Ultimately it should have no effect on the actual core tracing, which is
managed on p9 by non-SCOM accessible logic in PC. I confirmed with Jim Bishop
that the PC logic will not stop tracing on recoverable errors, so there should
be no exposure.
Change-Id: I77e47f71d18b6a3a762ab52b0f6b42d022153f3b
CQ: SW418341
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54857
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54861
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C index 3267de06..bcea4a2f 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -412,8 +412,7 @@ fapi2::ReturnCode p9_sbe_tracearray( } } - /* Nimbus DD1 core traces can't be read out via SCOM. - * Check an EC feature to see if that's fixed. */ + /* check that core trace arrays can be logged out, based on EC feature attribute */ if (ta_type == fapi2::TARGET_TYPE_CORE) { uint8_t l_core_trace_not_scomable = 0; @@ -425,7 +424,9 @@ fapi2::ReturnCode p9_sbe_tracearray( "Failed to query chip EC feature " "ATTR_CHIP_EC_FEATURE_CORE_TRACE_NOT_SCOMABLE"); - FAPI_ASSERT(!l_core_trace_not_scomable, fapi2::PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE() + FAPI_ASSERT(!l_core_trace_not_scomable || + !i_args.collect_dump, + fapi2::PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE() .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus), "Core arrays cannot be dumped in this chip EC; please use fastarray instead."); } @@ -454,8 +455,10 @@ fapi2::ReturnCode p9_sbe_tracearray( } } - /* Check that the trace mux is set up as expected */ - if (!i_args.ignore_mux_setting) + /* confirm the mux setting unless we are not dumping, or explicitly + instructed to skip the check */ + if (!i_args.ignore_mux_setting && + i_args.collect_dump) { fapi2::buffer<uint64_t> buf; FAPI_TRY(fapi2::getScom(target, |
