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| author | Joe McGill <jmcgill@us.ibm.com> | 2016-10-19 11:54:47 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-10-31 15:52:08 -0400 |
| commit | 4cf3d623b7e4148df3462431cbb21bd26dc095b5 (patch) | |
| tree | 331a63e7871b08d4dc9f64799a6a3760c9f69643 | |
| parent | b999146fa5f37be5e39723f5500a7c8a3e09529c (diff) | |
| download | talos-sbe-4cf3d623b7e4148df3462431cbb21bd26dc095b5.tar.gz talos-sbe-4cf3d623b7e4148df3462431cbb21bd26dc095b5.zip | |
p9_psi_init -- parametrize link speed (half/full)
Wrapper tested on zzfp033
Appears to correctly trigger half speed mode from FSP tool feedback
$ cat /sys/devices/psi_link0/clock
FSP-2, PSI(0) CLK overwrite: 1 Speed: 166 MHz
Change-Id: I45997c30e71457ceedfcba70550f0e6d98584a1e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31497
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31569
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index b15bdd18..8e7e1178 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -234,4 +234,22 @@ </chipEcFeature> </attribute> <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_PSI_HALF_SPEED</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1 only: enable half speed PSI link operation due to relaxed + chip timing closure + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> </attributes> |
