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authorJuan Medina <jr.medina@us.ibm.com>2017-01-30 10:17:10 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2017-02-16 22:37:37 -0500
commit370a6edc1b633a7efa2f2ed7a11dc39a5b71e2df (patch)
tree417fc61f2b1f9caf9d4aa3b1b8578c2317f42df3
parentd80fd3b3ad6762155666a31aa1a6e9160024fdd8 (diff)
downloadtalos-sbe-370a6edc1b633a7efa2f2ed7a11dc39a5b71e2df.tar.gz
talos-sbe-370a6edc1b633a7efa2f2ed7a11dc39a5b71e2df.zip
reverting FIRs to master values, setting only bit 8
Change-Id: I9ff37faffad1c6c2323c501a5c55992a81fc9fd8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35575 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35866 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 72a34d0d..c6a67e9a 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -2090,6 +2090,25 @@
</chip>
</chipEcFeature>
</attribute>
+
+ <attribute>
+ <id>ATTR_CHIP_EC_FEATURE_HW395939</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ For DD1, VAS has no BAR disable bit. Adding attribute to enable non zero
+ init for the MMIO BARs. Issue HW395939
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_NIMBUS</name>
+ <ec>
+ <value>0x20</value>
+ <test>LESS_THAN</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+
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