p9_xip_customize: Add #G and #R rings to the seeprom image from VPD

xip_customize supports the following:
- Updates mailbox attributes in Seeprom image
- Appends Mvpd #G and #R rings (but excl #G GPTR) into .rings
  ring section.
- Shuffles around .hbbl, .overrides and .rings so that .rings is the
  last section in the Seeprom image as otherwise we can't reappend
  .rings section after updating it (since it wasn't last to begin
  with).
- Honors of the bootCoreMask to append Vpd rings only for EC/EX/EQs
  associated with the ECs as indicated in the bootCoreMask.
- Removes .toc, .fixedtoc and .strings in the Seeprom image.
- Captures FFDC (100% complete).
- Detects potential image overflow condition.

Change-Id: I68bd2f39e3c407ea196f2228bdd31472a00a4c9e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26150
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30311
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

2 files changed, 16 insertions, 7 deletions

diff --git a/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H b/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H
index 409bf8d3..e6f61a51 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H
@@ -36,12 +36,18 @@
 //
 //@FIXME: CMO: get rid of FIXED_RING_BUF_SIZE when ring_apply no longer uses it.
 const uint32_t  FIXED_RING_BUF_SIZE     = 60000; // Fixed ring buf size for _fixed.
-const uint32_t  MAX_SEEPROM_IMAGE_SIZE  = 4 * 56 * 1024; // Max Seeprom size, excl ECC bits (4 banks).
+const uint32_t  MAX_SEEPROM_IMAGE_SIZE  = 4 * 56 * 1024 - 256; // Max Seeprom size, excl ECC bits (4 banks).
 const uint32_t  MAX_RT_IMAGE_SIZE       = 1024 * 1024;   // Max Runtime size.
 const uint32_t  MAX_RING_BUF_SIZE       = 60000;         // Max ring buffer size.
 const uint32_t  MAX_OVERRIDES_SIZE      = 2 * 1024;      // Max overrides section size.
 const uint32_t  MAX_HBBL_SIZE           = 20 * 1024;     // Max hbbl section size.
 
+//@FIXME: CMO: Aren't these defined somewhere else?
+#define NUM_OF_CORES    24
+#define NUM_OF_CMES     12
+#define NUM_OF_QUADS     6
+#define CORES_PER_QUAD  (NUM_OF_CORES/NUM_OF_QUADS)
+
 enum SYSPHASE
 {
     SYSPHASE_HB_SBE = 0,
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H
index 0b5bfcd8..01b2a054 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H
@@ -73,12 +73,15 @@ enum VpdKeyword
 
 enum VpdRingClass
 {
-    VPD_RING_CLASS_NEST = 0,   // Indicates NEST rings
-    VPD_RING_CLASS_EQ = 1,     // Indicates EQ rings
-    VPD_RING_CLASS_EX = 2,     // Indicates EX rings
-    VPD_RING_CLASS_EC = 3,     // Indicates EC rings
-    VPD_RING_CLASS_GPTR = 4,   // Indicates GPTR #G rings
-    VPD_RING_CLASS_LAST = 5,
+    VPD_RING_CLASS_NEST = 0,   // Indicates NEST [common] rings, except GPTR #G rings.
+    VPD_RING_CLASS_GPTR = 1,   // Indicates GPTR #G [common]rings
+    VPD_RING_CLASS_EQ = 2,     // Indicates EQ [common] rings
+    VPD_RING_CLASS_EX = 3,     // Indicates EX [common] rings
+    VPD_RING_CLASS_EC = 4,     // Indicates EC [common] rings
+    VPD_RING_CLASS_EQ_INS = 5, // Indicates EQ instance rings
+    VPD_RING_CLASS_EX_INS = 6, // Indicates EX instance rings
+    VPD_RING_CLASS_EC_INS = 7, // Indicates EC instance rings
+    VPD_RING_CLASS_LAST = 8,
 };