fix getscom_abs and _getscom code

Instead of reading the scom registers, and storing the results
to a memory address specified by o_data, the two routines were
loading data into a vector register, without storing it to the
o_data pointer, basically losing it.

There is no memory to memory PPC instruction, so the minimum number
of instructions to execute the code is two: a vector load and a vector store.

- Had to modify the ppe42_scom.h to make the _m_data parameter to the
PPE_LVD and PPE_LVDX macros an output only. Otherwise, the compiler
initializes the temp variable, adding two (useless) instructions.

- make the PPE_LVDX macro have the same flavor as PPE_LVD by eliminating
the pointer to m_data from both the _getscom function side and the
macro implementation side.

Change-Id: I67a9eef16ed1e0f95f02ff8ba0336558cc8b23e3
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20716
Tested-by: Jenkins Server
Reviewed-by: Claus Michael Olsen <cmolsen@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>

2 files changed, 34 insertions, 10 deletions

diff --git a/pk/ppe42/ppe42_scom.c b/pk/ppe42/ppe42_scom.c
index aee9db24..105b83a4 100755
--- a/pk/ppe42/ppe42_scom.c
+++ b/pk/ppe42/ppe42_scom.c
@@ -52,9 +52,10 @@ uint32_t _putscom( uint32_t i_chiplet_id, uint32_t i_address, uint64_t i_data)
 
 uint32_t getscom_abs( const uint32_t i_address, uint64_t *o_data)
 {
-    
+    uint64_t temp;
     // Perform the Load Virtual Double instruction
-    PPE_LVD(i_address, o_data);
+    PPE_LVD(i_address, temp);
+    PPE_STVD(o_data, temp);
 
     // Get the MSR[SIBRC] as the return code   
     uint32_t rc = mfmsr();
@@ -65,9 +66,10 @@ uint32_t getscom_abs( const uint32_t i_address, uint64_t *o_data)
 
 uint32_t _getscom( const uint32_t i_chiplet_id, const uint32_t i_address, uint64_t *o_data)
 {
-    
+    uint64_t temp;
     // Perform the Load Virtual Double Index instruction
-    PPE_LVDX(i_chiplet_id, i_address, o_data);
+    PPE_LVDX(i_chiplet_id, i_address, temp);
+    PPE_STVD(o_data, temp);
 
     // Get the MSR[SIBRC] as the return code   
     uint32_t rc = mfmsr();
diff --git a/pk/ppe42/ppe42_scom.h b/pk/ppe42/ppe42_scom.h
index 63c896a9..33d998b5 100755
--- a/pk/ppe42/ppe42_scom.h
+++ b/pk/ppe42/ppe42_scom.h
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/ppe/pk/ppe42/ppe42_scom.h $                               */
+/*                                                                        */
+/* OpenPOWER OnChipController Project                                     */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2015                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
 //-----------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2015
 // *! All Rights Reserved -- Property of IBM
@@ -35,9 +59,8 @@ extern "C" {
 asm volatile \
     ( \
     "lvd %[data], 0(%[address]) \n" \
-    :  [data]"=&r"(_m_data) \
-    :  "[data]"(_m_data), \
-       [address]"b"(_m_address) \
+    :  [data]"=r"(_m_data) \
+    :  [address]"b"(_m_address) \
     );
 
 
@@ -57,9 +80,8 @@ asm volatile \
 asm volatile \
     ( \
     "lvdx %[data], %[base], %[offset] \n" \
-    :  [data]"=&r"(*_m_data) \
-    :  "[data]"(*_m_data), \
-       [base]"b"(_m_base), \
+    :  [data]"=r"(_m_data) \
+    :  [base]"b"(_m_base), \
        [offset]"r"(_m_offset) \
     );