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authorGreg Still <stillgs@us.ibm.com>2017-08-24 13:34:06 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2017-08-31 09:18:05 -0400
commit011ccbc2748900554a8d94efea9eaf11a4f64181 (patch)
tree1f5d3203606ef06d74c487b5ac6527ea7efc2ddc
parent06e3929bc7bb50651c5ee8d21be7490f9285ae68 (diff)
downloadtalos-sbe-011ccbc2748900554a8d94efea9eaf11a4f64181.tar.gz
talos-sbe-011ccbc2748900554a8d94efea9eaf11a4f64181.zip
PM: Add atrribute control to SGPE for Core Periodic Quiesce
- Added SGPE header bit defintion - Hcode image build update to read attr and set header bit - Moved bit mask to using BIT macro for better readability Change-Id: Ie8f245bf3abd0f5c4dce994f81ea1b002feade00 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45124 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45178 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H10
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml19
2 files changed, 26 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H
index c8443aa8..2269ca8d 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H
@@ -93,9 +93,12 @@
//-------------------------
// Constants
//-------------------------
-
+#ifndef __PPE_PLAT
+#ifdef __cplusplus
namespace p9hcd
{
+#endif
+#endif
// Bit masks used by CME hcode
enum P9_HCD_CME_CORE_MASKS
@@ -271,8 +274,11 @@ enum SICR_DEFS
PCBMUX_REQ_C1 = 11
};
+#ifndef __PPE_PLAT
+#ifdef __cplusplus
} // END OF NAMESPACE p9hcd
-
+#endif
+#endif
#define P9_HCD_SCAN_FUNC_REPEAT 1
#define P9_HCD_SCAN_GPTR_REPEAT 1
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
index da97fc1b..79fc175a 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
@@ -901,6 +901,23 @@
</attribute>
<!-- ********************************************************************* -->
<attribute>
+ <id>ATTR_SYSTEM_CORE_PERIODIC_QUIESCE_DISABLE</id>
+ <targetType>TARGET_TYPE_SYSTEM</targetType>
+ <description>Disable the Core Periodic Quiesce Hang Buster function
+
+ Producer: Lab tools
+
+ Consumer: p9_hcode_image_build.C -> SGPE Hcode -> CME Hcode
+
+ Platform default: OFF
+ </description>
+ <valueType>uint8</valueType>
+ <enum>OFF=0, ON=1</enum>
+ <platInit/>
+ <initToZero/>
+ </attribute>
+ <!-- ********************************************************************* -->
+ <attribute>
<id>ATTR_SYSTEM_WOF_DISABLE</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>Disables Work Load Optimized Frequency (WOF) algorithms to
@@ -1881,7 +1898,7 @@
Consumer: p9_hcode_image_build.c ->
PGPE Header field
- Platform default: ON
+ Platform default: ON
<!--
@todo RTC 169662 at some point in the program, this default may be switched to
the opposite setting. However, coordination needs to occur with all CIs
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