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authorBen Gass <bgass@us.ibm.com>2018-10-19 07:32:27 -0500
committerRAJA DAS <rajadas2@in.ibm.com>2019-04-02 21:54:02 -0500
commit2d663084a8605ce9cf07b2da89bb15bf433451d8 (patch)
tree110a0a9f604fd060f0755c3c4098be33a5c957f7
parent26c8a88a4f65422415d839efc558715d619b1a8b (diff)
downloadtalos-sbe-2d663084a8605ce9cf07b2da89bb15bf433451d8.tar.gz
talos-sbe-2d663084a8605ce9cf07b2da89bb15bf433451d8.zip
Update p9_mss_eff_grouping for Axone support
Add p9a_omi_setup_bars procedure Add eclipse project files to .gitignore Change-Id: Ia18cd213ac8b3682e5718b3c631dad631b97170f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67755 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67763 Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C2
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml14
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml10
5 files changed, 20 insertions, 14 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C
index 5830540b..0dac8644 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2018 */
+/* Contributors Listed Below - COPYRIGHT 2016,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -104,7 +104,7 @@ fapi2::ReturnCode p9_l2_scom(const fapi2::Target<fapi2::TARGET_TYPE_EX>& TGT0,
if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5)
&& (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10))
|| ((l_chip_id == 0x6) && (l_chip_ec == 0x11)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x12)) || ((l_chip_id == 0x6)
- && (l_chip_ec == 0x13)) )
+ && (l_chip_ec == 0x13)) || ((l_chip_id == 0x7) && (l_chip_ec == 0x10)) )
{
l_scom_buffer.insert<32, 4, 60, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID );
l_scom_buffer.insert<36, 3, 61, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID );
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C
index c4d15b85..2401f42d 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2018 */
+/* Contributors Listed Below - COPYRIGHT 2016,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -118,7 +118,7 @@ fapi2::ReturnCode p9_l3_scom(const fapi2::Target<fapi2::TARGET_TYPE_EX>& TGT0,
if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5)
&& (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10))
|| ((l_chip_id == 0x6) && (l_chip_ec == 0x11)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x12)) || ((l_chip_id == 0x6)
- && (l_chip_ec == 0x13)) )
+ && (l_chip_ec == 0x13)) || ((l_chip_id == 0x7) && (l_chip_ec == 0x10)) )
{
l_scom_buffer.insert<23, 4, 60, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID );
l_scom_buffer.insert<27, 3, 61, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID );
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
index bcd22694..099d1b63 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
@@ -89,7 +89,7 @@ fapi2::ReturnCode p9_ncu_scom(const fapi2::Target<fapi2::TARGET_TYPE_EX>& TGT0,
if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5)
&& (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10))
|| ((l_chip_id == 0x6) && (l_chip_ec == 0x11)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x12)) || ((l_chip_id == 0x6)
- && (l_chip_ec == 0x13)) )
+ && (l_chip_ec == 0x13)) || ((l_chip_id == 0x7) && (l_chip_ec == 0x10)) )
{
l_scom_buffer.insert<44, 4, 60, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID );
l_scom_buffer.insert<48, 3, 61, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID );
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 84de0d63..3db8e356 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -8225,7 +8225,7 @@
<!-- ******************************************************************** -->
<attribute>
<id>ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE</id>>
- <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
+ <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
<description>
Defines chip HW support for extended addressing mode
</description>
@@ -8244,6 +8244,13 @@
<test>GREATER_THAN_OR_EQUAL</test>
</ec>
</chip>
+ <chip>
+ <name>ENUM_ATTR_NAME_AXONE</name>
+ <ec>
+ <value>0x10</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
</chipEcFeature>
</attribute>
<!-- ******************************************************************** -->
@@ -8825,11 +8832,10 @@
</attribute>
<!-- ******************************************************************** -->
<attribute>
- <id>ATTR_CHIP_EC_FEATURE_MEMORY_OMI_ATTACHED</id>
+ <id>ATTR_CHIP_EC_FEATURE_OMI</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
- The processor supports memory attached via OCMB memory buffer chip.
- OMI connection links processor and OCMB chips.
+ Chip uses OpenCAPI Memory Interface
</description>
<chipEcFeature>
<chip>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
index fc15e45f..57510a03 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2015,2018 -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2019 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
@@ -995,7 +995,7 @@
Set by p9_mss_eff_grouping.
</description>
<valueType>uint64</valueType>
- <array>4</array>
+ <array>8</array>
<writeable/>
<initToZero/>
</attribute>
@@ -1010,7 +1010,7 @@
Set by p9_mss_eff_grouping.
</description>
<valueType>uint64</valueType>
- <array>4</array>
+ <array>8</array>
<writeable/>
<initToZero/>
</attribute>
@@ -1387,7 +1387,7 @@
Used by p9_setup_bars.
</description>
<valueType>uint64</valueType>
- <array>4</array>
+ <array>8</array>
<writeable/>
<initToZero/>
</attribute>
@@ -1402,7 +1402,7 @@
Used by p9_setup_bars.
</description>
<valueType>uint64</valueType>
- <array>4</array>
+ <array>8</array>
<writeable/>
<initToZero/>
</attribute>
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