From 5d5a1bbf4e043a7b97e14a8a070d542d483b58c7 Mon Sep 17 00:00:00 2001 From: Andrew Geissler Date: Wed, 13 Mar 2019 20:30:52 +0000 Subject: intel-ipmi-oem: srcrev bump fcce83df79..7086a88cfe James Feist (1): Add Threshold bit to sensor capabilites (From meta-intel rev: 78ee092cb1d50300cd3902dbc2b4f247b3a91834) Change-Id: I54c38d2bfef17b1f717533f8987c028f1449ded1 Signed-off-by: Andrew Geissler Signed-off-by: Andrew Geissler --- meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-intel') diff --git a/meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb b/meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb index 7bf3d41c8..4d0d20476 100755 --- a/meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb +++ b/meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb @@ -5,7 +5,7 @@ LICENSE = "Apache-2.0" LIC_FILES_CHKSUM = "file://LICENSE;md5=a6a4edad4aed50f39a66d098d74b265b" SRC_URI = "git://github.com/openbmc/intel-ipmi-oem" -SRCREV = "fcce83df799d9580f48b7f793989c9c96bc882e0" +SRCREV = "7086a88cfe94db15233bae450b3a03d3566bca68" S = "${WORKDIR}/git" PV = "0.1+git${SRCPV}" -- cgit v1.2.1