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path: root/arch/arm/boot/dts/sh73a0.dtsi
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/*
 * Device Tree Source for the SH73A0 SoC
 *
 * Copyright (C) 2012 Renesas Solutions Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "skeleton.dtsi"

/ {
	compatible = "renesas,sh73a0";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
		};
		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <1>;
		};
	};

	gic: interrupt-controller@f0001000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <1>;
		interrupt-controller;
		reg = <0xf0001000 0x1000>,
		      <0xf0000100 0x100>;
	};

	i2c0: i2c@0xe6820000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6820000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 167 0x4
			      0 168 0x4
			      0 169 0x4
			      0 170 0x4>;
	};

	i2c1: i2c@0xe6822000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6822000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 51 0x4
			      0 52 0x4
			      0 53 0x4
			      0 54 0x4>;
	};

	i2c2: i2c@0xe6824000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6824000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 171 0x4
			      0 172 0x4
			      0 173 0x4
			      0 174 0x4>;
	};

	i2c3: i2c@0xe6826000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6826000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 183 0x4
			      0 184 0x4
			      0 185 0x4
			      0 186 0x4>;
	};

	i2c4: i2c@0xe6828000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6828000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 187 0x4
			      0 188 0x4
			      0 189 0x4
			      0 190 0x4>;
	};

	mmcif: mmcif@0x10010000 {
		compatible = "renesas,sh-mmcif";
		reg = <0xe6bd0000 0x100>;
		interrupt-parent = <&gic>;
		interrupts = <0 140 0x4
			      0 141 0x4>;
		reg-io-width = <4>;
		status = "disabled";
	};

	sdhi0: sdhi@0xee100000 {
		compatible = "renesas,shmobile-sdhi";
		reg = <0xee100000 0x100>;
		interrupt-parent = <&gic>;
		interrupts = <0 83 4
				0 84 4
				0 85 4>;
		toshiba,mmc-has-idle-wait;
		status = "disabled";
	};

	/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
	sdhi1: sdhi@0xee120000 {
		compatible = "renesas,shmobile-sdhi";
		reg = <0xee120000 0x100>;
		interrupt-parent = <&gic>;
		interrupts = <0 88 4
				0 89 4>;
		toshiba,mmc-wrprotect-disable;
		toshiba,mmc-has-idle-wait;
		status = "disabled";
	};

	sdhi2: sdhi@0xee140000 {
		compatible = "renesas,shmobile-sdhi";
		reg = <0xee140000 0x100>;
		interrupt-parent = <&gic>;
		interrupts = <0 104 4
				0 105 4>;
		toshiba,mmc-wrprotect-disable;
		toshiba,mmc-has-idle-wait;
		status = "disabled";
	};
};
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