From fed22007113cb857e917913ce016d9b539dc3a80 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 18 Jan 2012 19:17:06 +0000 Subject: ASoC: Disable register synchronisation for low frequency WM8996 SYSCLK With a low frequency SYSCLK and a fast I2C clock register synchronisation may occasionally take too long to take effect, causing I/O issues. Disable synchronisation in order to avoid any issues. Signed-off-by: Mark Brown Cc: stable@kernel.org --- sound/soc/codecs/wm8996.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'sound/soc/codecs/wm8996.c') diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c index d8da10fe5b52..86f5b6bd7af2 100644 --- a/sound/soc/codecs/wm8996.c +++ b/sound/soc/codecs/wm8996.c @@ -2007,6 +2007,7 @@ static int wm8996_set_sysclk(struct snd_soc_dai *dai, struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); int lfclk = 0; int ratediv = 0; + int sync = WM8996_REG_SYNC; int src; int old; @@ -2051,6 +2052,7 @@ static int wm8996_set_sysclk(struct snd_soc_dai *dai, case 32000: case 32768: lfclk = WM8996_LFCLK_ENA; + sync = 0; break; default: dev_warn(codec->dev, "Unsupported clock rate %dHz\n", @@ -2064,6 +2066,8 @@ static int wm8996_set_sysclk(struct snd_soc_dai *dai, WM8996_SYSCLK_SRC_MASK | WM8996_SYSCLK_DIV_MASK, src << WM8996_SYSCLK_SRC_SHIFT | ratediv); snd_soc_update_bits(codec, WM8996_CLOCKING_1, WM8996_LFCLK_ENA, lfclk); + snd_soc_update_bits(codec, WM8996_CONTROL_INTERFACE_1, + WM8996_REG_SYNC, sync); snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1, WM8996_SYSCLK_ENA, old); -- cgit v1.2.1