From 7a50f01a4ab89d5c05eb2cf62e206ac0bfc61d2c Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 21 Jul 2009 20:39:30 +1000 Subject: drm/radeon/kms: vram sizing on certain r100 chips needs workaround. If an rn50/r100/m6/m7 GPU has < 64MB RAM, i.e. 8/16/32, the aperture used to calculate the MC_FB_LOCATION needs to be worked out from the CONFIG_APER_SIZE register, and not the actual vram size. TTM VRAM size was also being initialised wrong, use actual vram size to initialise it. Signed-off-by: Dave Airlie --- drivers/gpu/drm/radeon/rv515.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/drm/radeon/rv515.c') diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 4fd411893b91..551e608702e4 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c @@ -100,10 +100,10 @@ int rv515_mc_init(struct radeon_device *rdev) "programming pipes. Bad things might happen.\n"); } /* Write VRAM size in case we are limiting it */ - WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); + WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size); tmp = REG_SET(MC_FB_START, rdev->mc.vram_location >> 16); WREG32(0x134, tmp); - tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; + tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; tmp = REG_SET(MC_FB_TOP, tmp >> 16); tmp |= REG_SET(MC_FB_START, rdev->mc.vram_location >> 16); WREG32_MC(MC_FB_LOCATION, tmp); @@ -369,10 +369,7 @@ void rv515_vram_info(struct radeon_device *rdev) fixed20_12 a; rv515_vram_get_type(rdev); - rdev->mc.vram_size = RREG32(CONFIG_MEMSIZE); - rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); - rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); /* FIXME: we should enforce default clock in case GPU is not in * default setup */ -- cgit v1.2.1