From 2cd6218cb8043ef4360b561e726cd081f8a380cc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Mon, 8 Mar 2010 22:14:01 +0000 Subject: drm/radeon/kms: clean assigning HDMI blocks to encoders MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We almost always used first HDMI block for first encoder and second for sencod. Exception was KLDSCP_LVTMA. Analyzing code picking DIG encoder shows the same behaviour. It shows HDMI block are related to DIGs, which relation we now use. Signed-off-by: Rafał Miłecki Signed-off-by: Dave Airlie --- drivers/gpu/drm/radeon/r600_audio.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/radeon/r600_audio.c') diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c index db928016d034..baf222faf158 100644 --- a/drivers/gpu/drm/radeon/r600_audio.c +++ b/drivers/gpu/drm/radeon/r600_audio.c @@ -224,6 +224,7 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock) struct drm_device *dev = encoder->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); + struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; int base_rate = 48000; switch (radeon_encoder->encoder_id) { @@ -245,7 +246,7 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock) return; } - switch (r600_audio_tmds_index(encoder)) { + switch (dig->dig_encoder) { case 0: WREG32(R600_AUDIO_PLL1_MUL, base_rate*50); WREG32(R600_AUDIO_PLL1_DIV, clock*100); @@ -257,6 +258,10 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock) WREG32(R600_AUDIO_PLL2_DIV, clock*100); WREG32(R600_AUDIO_CLK_SRCSEL, 1); break; + default: + dev_err(rdev->dev, "Unsupported DIG on encoder 0x%02X\n", + radeon_encoder->encoder_id); + return; } } -- cgit v1.2.1