From 116c7721077cf82b942adaef146e97663247d972 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 20 Sep 2018 00:17:42 +0300 Subject: drm/omap: Move DISPC timing checks to CRTC .mode_valid() operation The DISPC timings checks relate to the CRTC, but they're performed in the encoder and connector .atomic_check() and .mode_valid() operations. Move them to the CRTC .mode_valid() operation. Signed-off-by: Laurent Pinchart Reviewed-by: Sebastian Reichel Tested-by: Sebastian Reichel Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/omap_crtc.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers/gpu/drm/omapdrm/omap_crtc.c') diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index d99e24dcc0bf..ae399435346b 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c @@ -390,6 +390,15 @@ static enum drm_mode_status omap_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) { struct omap_drm_private *priv = crtc->dev->dev_private; + struct omap_crtc *omap_crtc = to_omap_crtc(crtc); + struct videomode vm = {0}; + int r; + + drm_display_mode_to_videomode(mode, &vm); + r = priv->dispc_ops->mgr_check_timings(priv->dispc, omap_crtc->channel, + &vm); + if (r) + return r; /* Check for bandwidth limit */ if (priv->max_bandwidth) { -- cgit v1.2.3