From 78ddb274b9ad81e64f55b19baf83d4a67e351973 Mon Sep 17 00:00:00 2001 From: Sam Ravnborg <sam@ravnborg.org> Date: Mon, 8 Jun 2009 19:48:32 +0200 Subject: [IA64] unexport fpswa.h fpswa.h is not relevant for userspace, so do not export it. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Tony Luck <tony.luck@intel.com> --- arch/ia64/include/asm/Kbuild | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/ia64/include') diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild index ccbe8ae47a61..c7d0a71b9242 100644 --- a/arch/ia64/include/asm/Kbuild +++ b/arch/ia64/include/asm/Kbuild @@ -2,7 +2,6 @@ include include/asm-generic/Kbuild.asm header-y += break.h header-y += fpu.h -header-y += fpswa.h header-y += ia64regs.h header-y += intel_intrin.h header-y += perfmon_default_smpl.h -- cgit v1.2.1 From 86bc3dfe6a76eb2fd332694f5052c862a3314efd Mon Sep 17 00:00:00 2001 From: Thomas Gleixner <tglx@linutronix.de> Date: Wed, 10 Jun 2009 12:45:00 -0700 Subject: [IA64] remove obsolete irq_desc_t typedef The defines and typedefs (hw_interrupt_type, no_irq_type, irq_desc_t) have been kept around for migration reasons. After more than two years it's time to remove them finally. This patch cleans up one of the remaining users. When all such patches hit mainline we can remove the defines and typedefs finally. Impact: cleanup Convert the last remaining users and remove the typedef. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com> --- arch/ia64/include/asm/hw_irq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/ia64/include') diff --git a/arch/ia64/include/asm/hw_irq.h b/arch/ia64/include/asm/hw_irq.h index 5c99cbcb8a0d..276f9d4584db 100644 --- a/arch/ia64/include/asm/hw_irq.h +++ b/arch/ia64/include/asm/hw_irq.h @@ -146,7 +146,7 @@ static inline void ia64_native_resend_irq(unsigned int vector) * Default implementations for the irq-descriptor API: */ -extern irq_desc_t irq_desc[NR_IRQS]; +extern struct irq_desc irq_desc[NR_IRQS]; #ifndef CONFIG_IA64_GENERIC static inline ia64_vector __ia64_irq_to_vector(int irq) -- cgit v1.2.1 From fb824f4838c3110c282268a3620f41da67b3f3fb Mon Sep 17 00:00:00 2001 From: Thomas Gleixner <tglx@linutronix.de> Date: Wed, 10 Jun 2009 12:45:00 -0700 Subject: [IA64] remove obsolete hw_interrupt_type The defines and typedefs (hw_interrupt_type, no_irq_type, irq_desc_t) have been kept around for migration reasons. After more than two years it's time to remove them finally. This patch cleans up one of the remaining users. When all such patches hit mainline we can remove the defines and typedefs finally. Impact: cleanup Convert the last remaining users to struct irq_chip and remove the define. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com> --- arch/ia64/include/asm/hw_irq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/ia64/include') diff --git a/arch/ia64/include/asm/hw_irq.h b/arch/ia64/include/asm/hw_irq.h index 276f9d4584db..91619b31dbf5 100644 --- a/arch/ia64/include/asm/hw_irq.h +++ b/arch/ia64/include/asm/hw_irq.h @@ -106,7 +106,7 @@ extern struct irq_cfg irq_cfg[NR_IRQS]; #define irq_to_domain(x) irq_cfg[(x)].domain DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq); -extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */ +extern struct irq_chip irq_type_ia64_lsapic; /* CPU-internal interrupt controller */ #ifdef CONFIG_PARAVIRT_GUEST #include <asm/paravirt.h> -- cgit v1.2.1 From 97de6ad196db75a26077171014493c9d26be8a5d Mon Sep 17 00:00:00 2001 From: Tony Luck <tony.luck@intel.com> Date: Mon, 15 Jun 2009 16:11:43 -0700 Subject: [IA64] hook up new rt_tgsigqueueinfo syscall Assign syscall #1321 for rt_tgsigqueueinfo. Signed-off-by: Tony Luck <tony.luck@intel.com> --- arch/ia64/include/asm/unistd.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/ia64/include') diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h index 10a9eb05f74d..61474f9156e7 100644 --- a/arch/ia64/include/asm/unistd.h +++ b/arch/ia64/include/asm/unistd.h @@ -310,11 +310,12 @@ #define __NR_inotify_init1 1318 #define __NR_preadv 1319 #define __NR_pwritev 1320 +#define __NR_rt_tgsigqueueinfo 1321 #ifdef __KERNEL__ -#define NR_syscalls 297 /* length of syscall table */ +#define NR_syscalls 298 /* length of syscall table */ /* * The following defines stop scripts/checksyscalls.sh from complaining about -- cgit v1.2.1 From e56e2dcd381d9ec35379328f332221581eda4787 Mon Sep 17 00:00:00 2001 From: Tony Luck <tony.luck@intel.com> Date: Mon, 15 Jun 2009 16:22:09 -0700 Subject: [IA64] ia64 does not need umount2() syscall ia64 doesn't have old and new versions of the umount system call. It just has the new version. Fixes this build warning: <stdin>:395:2: warning: #warning syscall umount2 not implemented Signed-off-by: Tony Luck <tony.luck@intel.com> --- arch/ia64/include/asm/unistd.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/ia64/include') diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h index 61474f9156e7..5a5347f5c4e4 100644 --- a/arch/ia64/include/asm/unistd.h +++ b/arch/ia64/include/asm/unistd.h @@ -329,6 +329,7 @@ #define __IGNORE_utime /* utimes() */ #define __IGNORE_getpgrp /* getpgid() */ #define __IGNORE_vfork /* clone() */ +#define __IGNORE_umount2 /* umount() */ #define __ARCH_WANT_SYS_RT_SIGACTION #define __ARCH_WANT_SYS_RT_SIGSUSPEND -- cgit v1.2.1 From e088a4ad7fa53c3dc3c29f930025f41ccf01953e Mon Sep 17 00:00:00 2001 From: Matthew Wilcox <matthew@wil.cx> Date: Fri, 22 May 2009 13:49:49 -0700 Subject: [IA64] Convert ia64 to use int-ll64.h It is generally agreed that it would be beneficial for u64 to be an unsigned long long on all architectures. ia64 (in common with several other 64-bit architectures) currently uses unsigned long. Migrating piecemeal is too painful; this giant patch fixes all compilation warnings and errors that come as a result of switching to use int-ll64.h. Note that userspace will still see __u64 defined as unsigned long. This is important as it affects C++ name mangling. [Updated by Tony Luck to change efi.h:efi_freemem_callback_t to use u64 for start/end rather than unsigned long] Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> --- arch/ia64/include/asm/gcc_intrin.h | 18 ++++++------ arch/ia64/include/asm/mca.h | 38 +++++++++++++------------- arch/ia64/include/asm/meminit.h | 18 ++++++------ arch/ia64/include/asm/pal.h | 24 ++++++++-------- arch/ia64/include/asm/processor.h | 56 +++++++++++++++++++------------------- arch/ia64/include/asm/sal.h | 8 +++--- arch/ia64/include/asm/sn/sn_sal.h | 2 +- arch/ia64/include/asm/types.h | 13 ++++++--- 8 files changed, 90 insertions(+), 87 deletions(-) (limited to 'arch/ia64/include') diff --git a/arch/ia64/include/asm/gcc_intrin.h b/arch/ia64/include/asm/gcc_intrin.h index c2c5fd8fcac4..21ddee54adae 100644 --- a/arch/ia64/include/asm/gcc_intrin.h +++ b/arch/ia64/include/asm/gcc_intrin.h @@ -388,7 +388,7 @@ register unsigned long ia64_r13 asm ("r13") __used; #define ia64_native_thash(addr) \ ({ \ - __u64 ia64_intri_res; \ + unsigned long ia64_intri_res; \ asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \ ia64_intri_res; \ }) @@ -419,7 +419,7 @@ register unsigned long ia64_r13 asm ("r13") __used; #define ia64_tpa(addr) \ ({ \ - __u64 ia64_pa; \ + unsigned long ia64_pa; \ asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \ ia64_pa; \ }) @@ -444,35 +444,35 @@ register unsigned long ia64_r13 asm ("r13") __used; #define ia64_native_get_cpuid(index) \ ({ \ - __u64 ia64_intri_res; \ + unsigned long ia64_intri_res; \ asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \ ia64_intri_res; \ }) #define __ia64_get_dbr(index) \ ({ \ - __u64 ia64_intri_res; \ + unsigned long ia64_intri_res; \ asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ ia64_intri_res; \ }) #define ia64_get_ibr(index) \ ({ \ - __u64 ia64_intri_res; \ + unsigned long ia64_intri_res; \ asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ ia64_intri_res; \ }) #define ia64_get_pkr(index) \ ({ \ - __u64 ia64_intri_res; \ + unsigned long ia64_intri_res; \ asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ ia64_intri_res; \ }) #define ia64_get_pmc(index) \ ({ \ - __u64 ia64_intri_res; \ + unsigned long ia64_intri_res; \ asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ ia64_intri_res; \ }) @@ -480,14 +480,14 @@ register unsigned long ia64_r13 asm ("r13") __used; #define ia64_native_get_pmd(index) \ ({ \ - __u64 ia64_intri_res; \ + unsigned long ia64_intri_res; \ asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ ia64_intri_res; \ }) #define ia64_native_get_rr(index) \ ({ \ - __u64 ia64_intri_res; \ + unsigned long ia64_intri_res; \ asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \ ia64_intri_res; \ }) diff --git a/arch/ia64/include/asm/mca.h b/arch/ia64/include/asm/mca.h index 18a4321349a3..44a0b53df900 100644 --- a/arch/ia64/include/asm/mca.h +++ b/arch/ia64/include/asm/mca.h @@ -72,39 +72,39 @@ typedef struct ia64_mc_info_s { struct ia64_sal_os_state { /* SAL to OS */ - u64 os_gp; /* GP of the os registered with the SAL, physical */ - u64 pal_proc; /* PAL_PROC entry point, physical */ - u64 sal_proc; /* SAL_PROC entry point, physical */ - u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */ - u64 proc_state_param; /* from R18 */ - u64 monarch; /* 1 for a monarch event, 0 for a slave */ + unsigned long os_gp; /* GP of the os registered with the SAL, physical */ + unsigned long pal_proc; /* PAL_PROC entry point, physical */ + unsigned long sal_proc; /* SAL_PROC entry point, physical */ + unsigned long rv_rc; /* MCA - Rendezvous state, INIT - reason code */ + unsigned long proc_state_param; /* from R18 */ + unsigned long monarch; /* 1 for a monarch event, 0 for a slave */ /* common */ - u64 sal_ra; /* Return address in SAL, physical */ - u64 sal_gp; /* GP of the SAL - physical */ + unsigned long sal_ra; /* Return address in SAL, physical */ + unsigned long sal_gp; /* GP of the SAL - physical */ pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */ /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK). * Note: if the MCA/INIT recovery code wants to resume to a new context * then it must change these values to reflect the new kernel stack. */ - u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */ - u64 prev_IA64_KR_CURRENT_STACK; + unsigned long prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */ + unsigned long prev_IA64_KR_CURRENT_STACK; struct task_struct *prev_task; /* previous task, NULL if it is not useful */ /* Some interrupt registers are not saved in minstate, pt_regs or * switch_stack. Because MCA/INIT can occur when interrupts are * disabled, we need to save the additional interrupt registers over * MCA/INIT and resume. */ - u64 isr; - u64 ifa; - u64 itir; - u64 iipa; - u64 iim; - u64 iha; + unsigned long isr; + unsigned long ifa; + unsigned long itir; + unsigned long iipa; + unsigned long iim; + unsigned long iha; /* OS to SAL */ - u64 os_status; /* OS status to SAL, enum below */ - u64 context; /* 0 if return to same context + unsigned long os_status; /* OS status to SAL, enum below */ + unsigned long context; /* 0 if return to same context 1 if return to new context */ }; @@ -150,7 +150,7 @@ extern void ia64_slave_init_handler(void); extern void ia64_mca_cmc_vector_setup(void); extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *)); extern void ia64_unreg_MCA_extension(void); -extern u64 ia64_get_rnat(u64 *); +extern unsigned long ia64_get_rnat(unsigned long *); extern void ia64_mca_printk(const char * fmt, ...) __attribute__ ((format (printf, 1, 2))); diff --git a/arch/ia64/include/asm/meminit.h b/arch/ia64/include/asm/meminit.h index c0cea375620a..688a812c017d 100644 --- a/arch/ia64/include/asm/meminit.h +++ b/arch/ia64/include/asm/meminit.h @@ -25,8 +25,8 @@ #define IA64_MAX_RSVD_REGIONS 9 struct rsvd_region { - unsigned long start; /* virtual address of beginning of element */ - unsigned long end; /* virtual address of end of element + 1 */ + u64 start; /* virtual address of beginning of element */ + u64 end; /* virtual address of end of element + 1 */ }; extern struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1]; @@ -35,13 +35,13 @@ extern int num_rsvd_regions; extern void find_memory (void); extern void reserve_memory (void); extern void find_initrd (void); -extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg); -extern int filter_memory (unsigned long start, unsigned long end, void *arg); -extern unsigned long efi_memmap_init(unsigned long *s, unsigned long *e); -extern int find_max_min_low_pfn (unsigned long , unsigned long, void *); +extern int filter_rsvd_memory (u64 start, u64 end, void *arg); +extern int filter_memory (u64 start, u64 end, void *arg); +extern unsigned long efi_memmap_init(u64 *s, u64 *e); +extern int find_max_min_low_pfn (u64, u64, void *); extern unsigned long vmcore_find_descriptor_size(unsigned long address); -extern int reserve_elfcorehdr(unsigned long *start, unsigned long *end); +extern int reserve_elfcorehdr(u64 *start, u64 *end); /* * For rounding an address to the next IA64_GRANULE_SIZE or order @@ -63,8 +63,8 @@ extern int register_active_ranges(u64 start, u64 len, int nid); # define LARGE_GAP 0x40000000 /* Use virtual mem map if hole is > than this */ extern unsigned long vmalloc_end; extern struct page *vmem_map; - extern int find_largest_hole (u64 start, u64 end, void *arg); - extern int create_mem_map_page_table (u64 start, u64 end, void *arg); + extern int find_largest_hole(u64 start, u64 end, void *arg); + extern int create_mem_map_page_table(u64 start, u64 end, void *arg); extern int vmemmap_find_next_valid_pfn(int, int); #else static inline int vmemmap_find_next_valid_pfn(int node, int i) diff --git a/arch/ia64/include/asm/pal.h b/arch/ia64/include/asm/pal.h index 67b02901ead4..6a292505b396 100644 --- a/arch/ia64/include/asm/pal.h +++ b/arch/ia64/include/asm/pal.h @@ -989,8 +989,8 @@ ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr) } /* Return summary information about the hierarchy of caches controlled by the processor */ -static inline s64 -ia64_pal_cache_summary (u64 *cache_levels, u64 *unique_caches) +static inline long ia64_pal_cache_summary(unsigned long *cache_levels, + unsigned long *unique_caches) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_CACHE_SUMMARY, 0, 0, 0); @@ -1038,8 +1038,8 @@ ia64_pal_copy_pal (u64 target_addr, u64 alloc_size, u64 processor, u64 *pal_proc } /* Return the number of instruction and data debug register pairs */ -static inline s64 -ia64_pal_debug_info (u64 *inst_regs, u64 *data_regs) +static inline long ia64_pal_debug_info(unsigned long *inst_regs, + unsigned long *data_regs) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_DEBUG_INFO, 0, 0, 0); @@ -1074,8 +1074,7 @@ ia64_pal_fixed_addr (u64 *global_unique_addr) } /* Get base frequency of the platform if generated by the processor */ -static inline s64 -ia64_pal_freq_base (u64 *platform_base_freq) +static inline long ia64_pal_freq_base(unsigned long *platform_base_freq) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_FREQ_BASE, 0, 0, 0); @@ -1437,7 +1436,7 @@ ia64_pal_proc_set_features (u64 feature_select) * possible. */ typedef struct ia64_ptce_info_s { - u64 base; + unsigned long base; u32 count[2]; u32 stride[2]; } ia64_ptce_info_t; @@ -1478,9 +1477,9 @@ ia64_pal_register_info (u64 info_request, u64 *reg_info_1, u64 *reg_info_2) } typedef union pal_hints_u { - u64 ph_data; + unsigned long ph_data; struct { - u64 si : 1, + unsigned long si : 1, li : 1, reserved : 62; } pal_hints_s; @@ -1489,8 +1488,8 @@ typedef union pal_hints_u { /* Return information about the register stack and RSE for this processor * implementation. */ -static inline s64 -ia64_pal_rse_info (u64 *num_phys_stacked, pal_hints_u_t *hints) +static inline long ia64_pal_rse_info(unsigned long *num_phys_stacked, + pal_hints_u_t *hints) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_RSE_INFO, 0, 0, 0); @@ -1608,8 +1607,7 @@ ia64_pal_vm_info (u64 tc_level, u64 tc_type, pal_tc_info_u_t *tc_info, u64 *tc_ /* Get page size information about the virtual memory characteristics of the processor * implementation. */ -static inline s64 -ia64_pal_vm_page_size (u64 *tr_pages, u64 *vw_pages) +static inline s64 ia64_pal_vm_page_size(u64 *tr_pages, u64 *vw_pages) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_VM_PAGE_SIZE, 0, 0, 0); diff --git a/arch/ia64/include/asm/processor.h b/arch/ia64/include/asm/processor.h index f88fa054d01d..3eaeedf1aef2 100644 --- a/arch/ia64/include/asm/processor.h +++ b/arch/ia64/include/asm/processor.h @@ -187,40 +187,40 @@ union ia64_rr { * state comes earlier: */ struct cpuinfo_ia64 { - __u32 softirq_pending; - __u64 itm_delta; /* # of clock cycles between clock ticks */ - __u64 itm_next; /* interval timer mask value to use for next clock tick */ - __u64 nsec_per_cyc; /* (1000000000<<IA64_NSEC_PER_CYC_SHIFT)/itc_freq */ - __u64 unimpl_va_mask; /* mask of unimplemented virtual address bits (from PAL) */ - __u64 unimpl_pa_mask; /* mask of unimplemented physical address bits (from PAL) */ - __u64 itc_freq; /* frequency of ITC counter */ - __u64 proc_freq; /* frequency of processor */ - __u64 cyc_per_usec; /* itc_freq/1000000 */ - __u64 ptce_base; - __u32 ptce_count[2]; - __u32 ptce_stride[2]; + unsigned int softirq_pending; + unsigned long itm_delta; /* # of clock cycles between clock ticks */ + unsigned long itm_next; /* interval timer mask value to use for next clock tick */ + unsigned long nsec_per_cyc; /* (1000000000<<IA64_NSEC_PER_CYC_SHIFT)/itc_freq */ + unsigned long unimpl_va_mask; /* mask of unimplemented virtual address bits (from PAL) */ + unsigned long unimpl_pa_mask; /* mask of unimplemented physical address bits (from PAL) */ + unsigned long itc_freq; /* frequency of ITC counter */ + unsigned long proc_freq; /* frequency of processor */ + unsigned long cyc_per_usec; /* itc_freq/1000000 */ + unsigned long ptce_base; + unsigned int ptce_count[2]; + unsigned int ptce_stride[2]; struct task_struct *ksoftirqd; /* kernel softirq daemon for this CPU */ #ifdef CONFIG_SMP - __u64 loops_per_jiffy; + unsigned long loops_per_jiffy; int cpu; - __u32 socket_id; /* physical processor socket id */ - __u16 core_id; /* core id */ - __u16 thread_id; /* thread id */ - __u16 num_log; /* Total number of logical processors on + unsigned int socket_id; /* physical processor socket id */ + unsigned short core_id; /* core id */ + unsigned short thread_id; /* thread id */ + unsigned short num_log; /* Total number of logical processors on * this socket that were successfully booted */ - __u8 cores_per_socket; /* Cores per processor socket */ - __u8 threads_per_core; /* Threads per core */ + unsigned char cores_per_socket; /* Cores per processor socket */ + unsigned char threads_per_core; /* Threads per core */ #endif /* CPUID-derived information: */ - __u64 ppn; - __u64 features; - __u8 number; - __u8 revision; - __u8 model; - __u8 family; - __u8 archrev; + unsigned long ppn; + unsigned long features; + unsigned char number; + unsigned char revision; + unsigned char model; + unsigned char family; + unsigned char archrev; char vendor[16]; char *model_name; @@ -329,8 +329,8 @@ struct thread_struct { #else # define INIT_THREAD_PM #endif - __u64 dbr[IA64_NUM_DBG_REGS]; - __u64 ibr[IA64_NUM_DBG_REGS]; + unsigned long dbr[IA64_NUM_DBG_REGS]; + unsigned long ibr[IA64_NUM_DBG_REGS]; struct ia64_fpreg fph[96]; /* saved/loaded on demand */ }; diff --git a/arch/ia64/include/asm/sal.h b/arch/ia64/include/asm/sal.h index 966797a97c94..d19ddba4e327 100644 --- a/arch/ia64/include/asm/sal.h +++ b/arch/ia64/include/asm/sal.h @@ -106,10 +106,10 @@ struct ia64_sal_retval { * informational value should be printed (e.g., "reboot for * change to take effect"). */ - s64 status; - u64 v0; - u64 v1; - u64 v2; + long status; + unsigned long v0; + unsigned long v1; + unsigned long v2; }; typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...); diff --git a/arch/ia64/include/asm/sn/sn_sal.h b/arch/ia64/include/asm/sn/sn_sal.h index e310fc0135dc..1f5ff470a5a1 100644 --- a/arch/ia64/include/asm/sn/sn_sal.h +++ b/arch/ia64/include/asm/sn/sn_sal.h @@ -929,7 +929,7 @@ ia64_sn_sysctl_tio_clock_reset(nasid_t nasid) /* * Get the associated ioboard type for a given nasid. */ -static inline s64 +static inline long ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard) { struct ia64_sal_retval isrv; diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h index fbf1ed3b44ce..bcd260e597de 100644 --- a/arch/ia64/include/asm/types.h +++ b/arch/ia64/include/asm/types.h @@ -2,10 +2,11 @@ #define _ASM_IA64_TYPES_H /* - * This file is never included by application software unless explicitly requested (e.g., - * via linux/types.h) in which case the application is Linux specific so (user-) name - * space pollution is not a major issue. However, for interoperability, libraries still - * need to be careful to avoid a name clashes. + * This file is never included by application software unless explicitly + * requested (e.g., via linux/types.h) in which case the application is + * Linux specific so (user-) name space pollution is not a major issue. + * However, for interoperability, libraries still need to be careful to + * avoid naming clashes. * * Based on <asm-alpha/types.h>. * @@ -13,7 +14,11 @@ * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co */ +#ifdef __KERNEL__ +#include <asm-generic/int-ll64.h> +#else #include <asm-generic/int-l64.h> +#endif #ifdef __ASSEMBLY__ # define __IA64_UL(x) (x) -- cgit v1.2.1