From 349ebbcc26258f40da5534a586233e7d6233071c Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Wed, 15 Apr 2009 08:48:08 +0000 Subject: Blackfin: add comment for anomaly 05000171 to init code Signed-off-by: Michael Hennerich Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/mach-common/ints-priority.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/blackfin/mach-common/ints-priority.c') diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index a7d7b2dd4059..3498a90979e5 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1116,6 +1116,9 @@ int __init init_arch_irq(void) IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; + /* This implicitly covers ANOMALY_05000171 + * Boot-ROM code modifies SICA_IWRx wakeup registers + */ #ifdef SIC_IWR0 bfin_write_SIC_IWR0(IWR_DISABLE_ALL); # ifdef SIC_IWR1 -- cgit v1.2.1 From 51387009bd4d9fdbc9d4a91e45bd96cc8e3065de Mon Sep 17 00:00:00 2001 From: Philippe Gerum Date: Wed, 8 Apr 2009 07:41:55 +0000 Subject: Blackfin: merge Philippe's recent ipipe patch ipipe-2.6.28.9-blackfin-git95aafe6.patch Singed-off-by: Philippe Gerum Signed-off-by: Yi Li Signed-off-by: Bryan Wu Signed-off-by: Mike Frysinger --- arch/blackfin/mach-common/ints-priority.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'arch/blackfin/mach-common/ints-priority.c') diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 3498a90979e5..389c5e8aa456 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1139,13 +1139,6 @@ int __init init_arch_irq(void) bfin_write_SIC_IWR(IWR_DISABLE_ALL); #endif -#ifdef CONFIG_IPIPE - for (irq = 0; irq < NR_IRQS; irq++) { - struct irq_desc *desc = irq_to_desc(irq); - desc->ic_prio = __ipipe_get_irq_priority(irq); - } -#endif /* CONFIG_IPIPE */ - return 0; } -- cgit v1.2.1 From 1fa9be72b558c39459f98835eb86dbb4ef4da30b Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Fri, 15 May 2009 11:01:59 +0000 Subject: Blackfin: add support for gptimer0 as a tick source For systems where the core cycles are not a usable tick source (like SMP or cycles gets updated), enable gptimer0 as an alternative. Signed-off-by: Graf Yang Signed-off-by: Mike Frysinger --- arch/blackfin/mach-common/ints-priority.c | 23 ++++++----------------- 1 file changed, 6 insertions(+), 17 deletions(-) (limited to 'arch/blackfin/mach-common/ints-priority.c') diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 389c5e8aa456..6e808612d170 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1052,7 +1052,7 @@ int __init init_arch_irq(void) set_irq_chained_handler(irq, bfin_demux_error_irq); break; #endif -#if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE) +#if defined(CONFIG_TICKSOURCE_GPTMR0) case IRQ_TIMER0: set_irq_handler(irq, handle_percpu_irq); break; @@ -1232,13 +1232,9 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) if (likely(vec == EVT_IVTMR_P)) { irq = IRQ_CORETMR; - goto core_tick; - } - - SSYNC(); + } else { #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) - { unsigned long sic_status[3]; sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); @@ -1254,9 +1250,7 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag) break; } - } #else - { unsigned long sic_status; sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR(); @@ -1268,15 +1262,13 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) } else if (sic_status & ivg->isrflag) break; } - } #endif - irq = ivg->irqno; + irq = ivg->irqno; + } if (irq == IRQ_SYSTMR) { -#ifdef CONFIG_GENERIC_CLOCKEVENTS -core_tick: -#else +#ifndef CONFIG_GENERIC_CLOCKEVENTS bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ #endif /* This is basically what we need from the register frame. */ @@ -1288,9 +1280,6 @@ core_tick: __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10; } -#ifndef CONFIG_GENERIC_CLOCKEVENTS -core_tick: -#endif if (this_domain == ipipe_root_domain) { s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status); barrier(); @@ -1308,7 +1297,7 @@ core_tick: } } - return 0; + return 0; } #endif /* CONFIG_IPIPE */ -- cgit v1.2.1 From 780172bf875298133fe5627552a632d1fda3775a Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 1 Jun 2009 19:43:02 -0400 Subject: Blackfin: check SIC defines rather than variant names Rather than having to maintain a hard coded list of Blackfin variants, use the SIC defines themselves. This fixes build problems on BF51x/BF538 under some configurations as they were missing from one of the lists. Signed-off-by: Mike Frysinger --- arch/blackfin/mach-common/ints-priority.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) (limited to 'arch/blackfin/mach-common/ints-priority.c') diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 6e808612d170..351afd0e36d8 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1152,23 +1152,22 @@ void do_irq(int vec, struct pt_regs *fp) } else { struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; -#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \ - || defined(BF538_FAMILY) || defined(CONFIG_BF51x) +#if defined(SIC_ISR0) || defined(SICA_ISR0) unsigned long sic_status[3]; if (smp_processor_id()) { -#ifdef CONFIG_SMP +# ifdef SICB_ISR0 /* This will be optimized out in UP mode. */ sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0(); sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1(); -#endif +# endif } else { sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); } -#ifdef CONFIG_BF54x +# ifdef SIC_ISR2 sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); -#endif +# endif for (;; ivg++) { if (ivg >= ivg_stop) { atomic_inc(&num_spurious); @@ -1234,14 +1233,14 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) irq = IRQ_CORETMR; } else { -#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) +#if defined(SIC_ISR0) || defined(SICA_ISR0) unsigned long sic_status[3]; sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); -#ifdef CONFIG_BF54x +# ifdef SIC_ISR2 sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); -#endif +# endif for (;; ivg++) { if (ivg >= ivg_stop) { atomic_inc(&num_spurious); -- cgit v1.2.1