From 9ee9fff92e02e8c5f84794b3a5ce47646c2dfc39 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 21 Sep 2010 10:34:08 -0600 Subject: OMAP: hwmod: Rename dma_ch to dma_req The dma request line attribute was named dma channel, which leads to confusion with the real dma channel definition. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley Tested-by: Kevin Hilman --- arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index a4e508dfaba2..5506d80d94b9 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -96,7 +96,7 @@ struct omap_hwmod_irq_info { /** * struct omap_hwmod_dma_info - DMA channels used by the hwmod * @name: name of the DMA channel (module local name) - * @dma_ch: DMA channel ID + * @dma_req: DMA request ID * * @name should be something short, e.g., "tx" or "rx". It is for use * by platform_get_resource_byname(). It is defined locally to the @@ -104,7 +104,7 @@ struct omap_hwmod_irq_info { */ struct omap_hwmod_dma_info { const char *name; - u16 dma_ch; + u16 dma_req; }; /** @@ -410,7 +410,7 @@ struct omap_hwmod_class { * @class: struct omap_hwmod_class * to the class of this hwmod * @od: struct omap_device currently associated with this hwmod (internal use) * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) - * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt) + * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) * @prcm: PRCM data pertaining to this hwmod * @main_clk: main clock: OMAP clock name * @_clk: pointer to the main struct clk (filled in at runtime) @@ -424,7 +424,7 @@ struct omap_hwmod_class { * @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6) * @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift * @mpu_irqs_cnt: number of @mpu_irqs - * @sdma_chs_cnt: number of @sdma_chs + * @sdma_reqs_cnt: number of @sdma_reqs * @opt_clks_cnt: number of @opt_clks * @master_cnt: number of @master entries * @slaves_cnt: number of @slave entries @@ -448,7 +448,7 @@ struct omap_hwmod { struct omap_hwmod_class *class; struct omap_device *od; struct omap_hwmod_irq_info *mpu_irqs; - struct omap_hwmod_dma_info *sdma_chs; + struct omap_hwmod_dma_info *sdma_reqs; union { struct omap_hwmod_omap2_prcm omap2; struct omap_hwmod_omap4_prcm omap4; @@ -468,7 +468,7 @@ struct omap_hwmod { u8 msuspendmux_shift; u8 response_lat; u8 mpu_irqs_cnt; - u8 sdma_chs_cnt; + u8 sdma_reqs_cnt; u8 opt_clks_cnt; u8 masters_cnt; u8 slaves_cnt; -- cgit v1.2.1 From 12b1fdb45c2594070bb36e39cd89a33547aad8fb Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 21 Sep 2010 10:34:09 -0600 Subject: OMAP: hwmod: separate list locking and hwmod hardware locking Currently omap_hwmod_mutex is being used to protect both the list access/modification and concurrent access to hwmod functions. This patch separates these two types of locking. First, omap_hwmod_mutex is used only to protect access and modification of omap_hwmod_list. Also cleaned up some comments referring to this mutex that are no longer needed. Then, for protecting concurrent access to hwmod functions, use a per-hwmod mutex. This protects concurrent access to a single hwmod, but would allow concurrent access to different hwmods. Signed-off-by: Kevin Hilman [paul@pwsan.com: added structure documentation; changed mutex variable name] Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/include/plat/omap_hwmod.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 5506d80d94b9..03350bac01d8 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -35,6 +35,7 @@ #include #include #include +#include #include struct omap_device; @@ -433,6 +434,7 @@ struct omap_hwmod_class { * @_state: internal-use hwmod state * @flags: hwmod flags (documented below) * @omap_chip: OMAP chips this hwmod is present on + * @_mutex: mutex serializing operations on this hwmod * @node: list node for hwmod list (internal use) * * @main_clk refers to this module's "main clock," which for our @@ -461,6 +463,7 @@ struct omap_hwmod { void *dev_attr; u32 _sysc_cache; void __iomem *_mpu_rt_va; + struct mutex _mutex; struct list_head node; u16 flags; u8 _mpu_port_index; -- cgit v1.2.1 From 16b040129e324598d13ff2e2b3469dc2e909ce12 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 21 Sep 2010 10:34:10 -0600 Subject: OMAP4: prcm: Add temporarily helper functions for rmw and read inside the PRM Since OMAP4 is using an absolute address, the current PRM accessors are not useable. OMAP4 adaptation for these API are currently ongoing, so define temp version until the proper ones are defined. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley Tested-by: Kevin Hilman --- arch/arm/plat-omap/include/plat/prcm.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h index 9fbd91419cd1..ab77442e42ab 100644 --- a/arch/arm/plat-omap/include/plat/prcm.h +++ b/arch/arm/plat-omap/include/plat/prcm.h @@ -38,6 +38,8 @@ u32 prm_read_mod_reg(s16 module, u16 idx); void prm_write_mod_reg(u32 val, s16 module, u16 idx); u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg); u32 cm_read_mod_reg(s16 module, u16 idx); void cm_write_mod_reg(u32 val, s16 module, u16 idx); u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); -- cgit v1.2.1 From 5365efbe29250a227502256cc912351fe2157b42 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Cousson?= Date: Tue, 21 Sep 2010 10:34:11 -0600 Subject: OMAP: hwmod: Add hardreset management support Most processor IPs does have a hardreset signal controlled by the PRM. This is different of the softreset used for local IP reset from the SYSCONFIG register. The granularity can be much finer than orginal HWMOD, for ex, the IVA hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2... Since this granularity is needed by the driver, we have to ensure than one hwmod exist for each hardreset line. - Store reset lines as hwmod resources that a driver can query by name like an irq or sdma line. - Add two functions for asserting / deasserting reset lines in hwmods processor that require manual reset control. - Add one functions to get the current reset state. - If an hwmod contains only one line, an automatic assertion / de-assertion is done. -> de-assert the hardreset line only during enable from disable transition -> assert the hardreset line only during shutdown Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be kept in INITIALIZED state. They can be properly enabled only if the hardreset line is de-asserted before. For information here is the list of IPs with HW reset control on an OMAP4430 device: RM_DSP_RSTCTRL 1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control' 0,0,'RST1','RW','1','DSP - DSP reset control' RM_IVA_RSTCTRL 2,2,'RST3','RW','1','IVA logic and SL2 reset control' 1,1,'RST2','RW','1','IVA Sequencer2 reset control' 0,0,'RST1','RW','1','IVA sequencer1 reset control' RM_IPU_RSTCTRL 2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.' 1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.' 0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.' PRM_RSTCTRL 1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.' 0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.' RM_CPU0_CPU0_RSTCTRL RM_CPU1_CPU1_RSTCTRL 0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control' Signed-off-by: Benoit Cousson [paul@pwsan.com: made the hardreset functions static; moved the register twiddling into prm*.c functions in previous patches; changed the function names to conform with hwmod practice] Signed-off-by: Paul Walmsley Cc: Kevin Hilman Cc: Rajendra Nayak --- arch/arm/plat-omap/include/plat/omap_hwmod.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 03350bac01d8..590bfae250e8 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -108,6 +108,19 @@ struct omap_hwmod_dma_info { u16 dma_req; }; +/** + * struct omap_hwmod_rst_info - IPs reset lines use by hwmod + * @name: name of the reset line (module local name) + * @rst_shift: Offset of the reset bit + * + * @name should be something short, e.g., "cpu0" or "rst". It is defined + * locally to the hwmod. + */ +struct omap_hwmod_rst_info { + const char *name; + u8 rst_shift; +}; + /** * struct omap_hwmod_opt_clk - optional clocks used by this hwmod * @role: "sys", "32k", "tv", etc -- for use in clk_get() @@ -328,10 +341,12 @@ struct omap_hwmod_omap2_prcm { /** * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data * @clkctrl_reg: PRCM address of the clock control register + * @rstctrl_reg: adress of the XXX_RSTCTRL register located in the PRM * @submodule_wkdep_bit: bit shift of the WKDEP range */ struct omap_hwmod_omap4_prcm { void __iomem *clkctrl_reg; + void __iomem *rstctrl_reg; u8 submodule_wkdep_bit; }; @@ -451,6 +466,7 @@ struct omap_hwmod { struct omap_device *od; struct omap_hwmod_irq_info *mpu_irqs; struct omap_hwmod_dma_info *sdma_reqs; + struct omap_hwmod_rst_info *rst_lines; union { struct omap_hwmod_omap2_prcm omap2; struct omap_hwmod_omap4_prcm omap4; @@ -472,6 +488,7 @@ struct omap_hwmod { u8 response_lat; u8 mpu_irqs_cnt; u8 sdma_reqs_cnt; + u8 rst_lines_cnt; u8 opt_clks_cnt; u8 masters_cnt; u8 slaves_cnt; -- cgit v1.2.1 From aee48e3c9cee3698d17b4cf4203551de0a804760 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 21 Sep 2010 10:34:11 -0600 Subject: OMAP: hwmod: add an hardreset API for use by other core code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Expose an hardreset API from hwmod in order to assert / deassert all the individual reset lines that belong to an hwmod. This API is needed by some of the more complicated processor drivers, e.g., DSP/Bridge, Syslink, etc. Signed-off-by: Paul Walmsley Cc: Benoît Cousson --- arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 590bfae250e8..7fde44d3c248 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -512,6 +512,10 @@ int omap_hwmod_idle(struct omap_hwmod *oh); int _omap_hwmod_idle(struct omap_hwmod *oh); int omap_hwmod_shutdown(struct omap_hwmod *oh); +int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name); +int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name); +int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name); + int omap_hwmod_enable_clocks(struct omap_hwmod *oh); int omap_hwmod_disable_clocks(struct omap_hwmod *oh); -- cgit v1.2.1 From 2cb068149c365f1c2b10f2ece6786139527dcc16 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 21 Sep 2010 18:57:59 +0200 Subject: OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs In OMAP3 a specific SYSSTATUS register was used to get the softreset status. Starting in OMAP4, some IPs does not have SYSSTATUS register and instead use the SYSC softreset bit to provide the status. Other cases might exist: - Some IPs like McBSP does have a softreset control but no reset status. - Some IPs that represent subsystem, like the DSS, can contains a reset status without softreset control. The status is the aggregation of all the sub modules reset status. - Add a new flag (SYSC_HAS_RESET_STATUS) to identify the new programming model and replace the previous SYSS_MISSING, that was used to flag IP with softreset control but without the SYSSTATUS register, with a specific SYSS_HAS_RESET_STATUS flag. - MCSPI and MMC contains both programming models, so the legacy one will be prevented by removing the syss offset field that become useless. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley Cc: Kevin Hilman Cc: Rajendra Nayak --- arch/arm/plat-omap/include/plat/omap_hwmod.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 7fde44d3c248..faa08273b1e4 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -251,8 +251,9 @@ struct omap_hwmod_ocp_if { #define SYSC_HAS_CLOCKACTIVITY (1 << 4) #define SYSC_HAS_SIDLEMODE (1 << 5) #define SYSC_HAS_MIDLEMODE (1 << 6) -#define SYSS_MISSING (1 << 7) +#define SYSS_HAS_RESET_STATUS (1 << 7) #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ +#define SYSC_HAS_RESET_STATUS (1 << 9) /* omap_hwmod_sysconfig.clockact flags */ #define CLOCKACT_TEST_BOTH 0x0 -- cgit v1.2.1 From 96835af970e5d6aeedf868e53590a947be5e4a7a Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 21 Sep 2010 18:57:58 +0200 Subject: OMAP: hwmod: Fix softreset for modules with optional clocks Some modules (like GPIO, DSS...) require optionals clock to be enabled in order to complete the sofreset properly. Add a HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to force all optional clocks to be enabled before reset. Disabled them once the reset is done. TODO: For the moment it is very hard to understand from the HW spec, which optional clock is needed and which one is not. So the current approach will enable all the optional clocks. Paul proposed a much finer approach that will allow to tag only the needed clock in the optional clock table. This might be doable as soon as we have a clear understanding of these dependencies. Reported-by: Partha Basak Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley Cc: Kevin Hilman --- arch/arm/plat-omap/include/plat/omap_hwmod.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index faa08273b1e4..ee53758e1f49 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -369,6 +369,10 @@ struct omap_hwmod_omap4_prcm { * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup * HWMOD_NO_IDLEST : this module does not have idle status - this is the case * only for few initiator modules on OMAP2 & 3. + * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset. + * This is needed for devices like DSS that require optional clocks enabled + * in order to complete the reset. Optional clocks will be disabled + * again after the reset. */ #define HWMOD_SWSUP_SIDLE (1 << 0) #define HWMOD_SWSUP_MSTANDBY (1 << 1) @@ -377,6 +381,7 @@ struct omap_hwmod_omap4_prcm { #define HWMOD_NO_OCP_AUTOIDLE (1 << 4) #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5) #define HWMOD_NO_IDLEST (1 << 6) +#define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) /* * omap_hwmod._int_flags definitions -- cgit v1.2.1 From 74ff3a68ed11f1e9eede4fe301f42cc3cdf7396a Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 21 Sep 2010 15:02:23 -0600 Subject: OMAP: hwmod: improve documentation, clean up function names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch: - adds more documentation to the hwmod code - fixes some documentation typos elsewhere in the file - changes the _sysc_*() function names to appear in (verb, noun) order, to match the rest of the function names. This patch should not result in any functional change. Signed-off-by: Paul Walmsley Cc: Kevin Hilman Cc: Benoît Cousson --- arch/arm/plat-omap/include/plat/omap_hwmod.h | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index ee53758e1f49..72902814c3ca 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -14,19 +14,16 @@ * * These headers and macros are used to define OMAP on-chip module * data and their integration with other OMAP modules and Linux. - * - * References: - * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) - * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) - * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) - * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) - * - Open Core Protocol Specification 2.2 + * Copious documentation and references can also be found in the + * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this + * writing). * * To do: * - add interconnect error log structures * - add pinmuxing * - init_conn_id_bit (CONNID_BIT_VECTOR) * - implement default hwmod SMS/SDRC flags? + * - remove unused fields * */ #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H -- cgit v1.2.1 From b3294e2327718e9487e662d1392b36b39f07d70b Mon Sep 17 00:00:00 2001 From: Thara Gopinath Date: Wed, 1 Sep 2010 13:44:53 +0530 Subject: OMAP4: pm.c extensions for OMAP4 support OMAP4 has an iva device and a dsp devcice where as OMAP2/3 has only an iva device. In this file the iva device in the system is registered under the name dsp_dev and the API to retrieve the iva device is omap2_get_dsp_device. This patch renames the dsp_dev to iva_dev, renames omap2_get_dsp_device to omap2_get_iva_device, registers dsp_dev for OMAP4 and adds a new API omap4_get_dsp_device to retrieve the dep_dev. Signed-off-by: Thara Gopinath Signed-off-by: Kevin Hilman --- arch/arm/plat-omap/include/plat/common.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 9776b41ad76f..c45dbb975e09 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -91,7 +91,8 @@ void omap3_map_io(void); }) extern struct device *omap2_get_mpuss_device(void); -extern struct device *omap2_get_dsp_device(void); +extern struct device *omap2_get_iva_device(void); extern struct device *omap2_get_l3_device(void); +extern struct device *omap4_get_dsp_device(void); #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ -- cgit v1.2.1 From a1ed40cb258ba7a8574e662de5ae6ba4dc314436 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 23 Aug 2010 10:53:10 -0700 Subject: Revert "OMAP: omap_device: add omap_device_is_valid()" This reverts commit 0007122ad85cc36b1c18c0b59344093ca210d206. The dereference method of checking for a valid omap_device when wrapping a platform_device is rather unsafe and dangerous. Instead, a better way of checking for a valid omap-device is to use a common parent device for all omap_devices, then a check can simply be made using the device parent. The only user of this API was the initial version of the runtime PM core for OMAP. This has now been switched to check device parent, so there are no more users of this API. Acked-by: Paul Walmsley Signed-off-by: Kevin Hilman --- arch/arm/plat-omap/include/plat/omap_device.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index 25cd9ac3b095..bad4c3df70d8 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h @@ -62,7 +62,6 @@ * */ struct omap_device { - u32 magic; struct platform_device pdev; struct omap_hwmod **hwmods; struct omap_device_pm_latency *pm_lats; @@ -82,7 +81,6 @@ int omap_device_shutdown(struct platform_device *pdev); /* Core code interface */ -bool omap_device_is_valid(struct omap_device *od); int omap_device_count_resources(struct omap_device *od); int omap_device_fill_resources(struct omap_device *od, struct resource *res); -- cgit v1.2.1 From 0d5e825252e184a5608c8a9827b79f591535b806 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 23 Aug 2010 08:10:55 -0700 Subject: OMAP: omap_device: make all devices a child of a new parent device In order to help differentiate omap_devices from normal platform_devices, make them all a parent of a new common parent device. Then, in order to determine if a platform_device is also an omap_device, checking the parent is all that is needed. Users of this feature are the runtime PM core for OMAP, where we need to know if a device being passed in is an omap_device or not in order to know whether to call the omap_device API with it. In addition, all omap_devices will now show up under /sys/devices/omap instead of /sys/devices/platform Acked-by: Paul Walmsley Signed-off-by: Kevin Hilman --- arch/arm/plat-omap/include/plat/omap_device.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index bad4c3df70d8..28e2d1a78433 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h @@ -36,6 +36,8 @@ #include +extern struct device omap_device_parent; + /* omap_device._state values */ #define OMAP_DEVICE_STATE_UNKNOWN 0 #define OMAP_DEVICE_STATE_ENABLED 1 -- cgit v1.2.1 From 55d2cb0814f4285f89be8ed474a8ae7042fb5735 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Wed, 12 May 2010 17:54:36 +0200 Subject: OMAP4: hwmod: Add initial data for OMAP4430 ES1 & ES2 The current version contains only the interconnects and the mpu hwmods. The remaining hwmods will be introduced by further patches on top of this one. - enable as well omap_hwmod.c build for OMAP4 Soc Please not that this file uses the new naming convention for naming HW IPs. This convention will be backported soon for previous OMAP2 & 3 data files. new name trm name ------------- ------------------- counter_32k synctimer_32k l3_main l3 timerX gptimerX / dmtimerX mmcX mmchsX / sdmmcX dma_system sdma smartreflex_X sr_X / sr? usb_host_fs usbfshost usb_otg_hs hsusbotg usb_tll_hs usbtllhs_config wd_timerX wdtimerX ipu cortexm3 / ducati dsp c6x / tesla iva ivahd / iva2.2 kbd kbdocp / keyboard mailbox system_mailbox mpu cortexa9 / chiron Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Kevin Hilman Cc: Rajendra Nayak Signed-off-by: Kevin Hilman --- arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index a4e508dfaba2..cab4a681a121 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -534,5 +534,6 @@ int omap_hwmod_for_each_by_class(const char *classname, extern int omap2420_hwmod_init(void); extern int omap2430_hwmod_init(void); extern int omap3xxx_hwmod_init(void); +extern int omap44xx_hwmod_init(void); #endif -- cgit v1.2.1 From ed6be0bafc7781634a197ddd85b575ffcd7736b6 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Thu, 16 Sep 2010 18:44:46 +0530 Subject: omap4: Update id.c and cpu.h for es2.0 This patch updates the id.c and cpu.h files to support omap4 ES2.0 silicon detection. Few initial omap4 es2 samples IDCODE is same as es1. So the patch uses ARM cpuid register to detect the ES version for such samples Signed-off-by: Santosh Shilimkar --- arch/arm/plat-omap/include/plat/cpu.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 2e2ae530fced..9b38e4bddf57 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -391,6 +391,7 @@ IS_OMAP_TYPE(3517, 0x3517) #define OMAP443X_CLASS 0x44300044 #define OMAP4430_REV_ES1_0 0x44300044 +#define OMAP4430_REV_ES2_0 0x44301044 /* * omap_chip bits @@ -417,10 +418,12 @@ IS_OMAP_TYPE(3517, 0x3517) #define CHIP_IS_OMAP4430ES1 (1 << 8) #define CHIP_IS_OMAP3630ES1_1 (1 << 9) #define CHIP_IS_OMAP3630ES1_2 (1 << 10) +#define CHIP_IS_OMAP4430ES2 (1 << 11) #define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430) -#define CHIP_IS_OMAP4430 (CHIP_IS_OMAP4430ES1) +#define CHIP_IS_OMAP4430 (CHIP_IS_OMAP4430ES1 | \ + CHIP_IS_OMAP4430ES2) /* * "GE" here represents "greater than or equal to" in terms of ES -- cgit v1.2.1 From b5be6b66b7a33f48bf0dfb466443ae9b65e69871 Mon Sep 17 00:00:00 2001 From: David Anders Date: Thu, 16 Sep 2010 18:44:47 +0530 Subject: omap4: Panda: Add DEBUG_LL support Add support for use of DEBUG_LL for use with PandaBoard. Signed-off-by: David Anders --- arch/arm/plat-omap/include/plat/uncompress.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index ddf723be48dc..57dffa7e3ea6 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h @@ -153,6 +153,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id) /* omap4 based boards using UART3 */ DEBUG_LL_OMAP4(3, omap_4430sdp); + DEBUG_LL_OMAP4(3, omap4_panda); /* zoom2/3 external uart */ DEBUG_LL_ZOOM(omap_zoom2); -- cgit v1.2.1 From afc28bc0ec5ebe1b71108735e27283a19feb2e24 Mon Sep 17 00:00:00 2001 From: Anand Gadiyar Date: Thu, 16 Sep 2010 16:22:13 -0700 Subject: omap: usb: fix build warning Fix this and similar build warnings when building with omap_4430sdp_defconfig. CC arch/arm/mach-omap2/board-4430sdp.o In file included from arch/arm/mach-omap2/board-4430sdp.c:36: arch/arm/plat-omap/include/plat/usb.h:109: warning: return type defaults to 'int' Signed-off-by: Anand Gadiyar Acked-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/usb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h index 2a9427c8cc48..667456228a12 100644 --- a/arch/arm/plat-omap/include/plat/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h @@ -105,7 +105,7 @@ static inline void omap1_usb_init(struct omap_usb_config *pdata) #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP_OTG_MODULE) void omap2_usbfs_init(struct omap_usb_config *pdata); #else -static inline omap2_usbfs_init(struct omap_usb_config *pdata) +static inline void omap2_usbfs_init(struct omap_usb_config *pdata) { } #endif -- cgit v1.2.1 From 813f6c5850521fec8917f61813be59691b60fcdf Mon Sep 17 00:00:00 2001 From: "Subramaniam C.A" Date: Tue, 24 Aug 2010 12:02:28 -0500 Subject: omap: i2c: Avoid compilation error in case the header is included multiple times Added defines to avoid compilation error. Signed-off-by: Subramaniam C.A Acked-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/i2c.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index 87f6bf2ea4fa..36a0befd6168 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -18,6 +18,8 @@ * 02110-1301 USA * */ +#ifndef __ASM__ARCH_OMAP_I2C_H +#define __ASM__ARCH_OMAP_I2C_H #include @@ -36,3 +38,5 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, void __init omap1_i2c_mux_pins(int bus_id); void __init omap2_i2c_mux_pins(int bus_id); + +#endif /* __ASM__ARCH_OMAP_I2C_H */ -- cgit v1.2.1 From 3a63833ec3002816a759a49ebda4e229c089114e Mon Sep 17 00:00:00 2001 From: Sukumar Ghorai Date: Wed, 15 Sep 2010 14:49:23 +0000 Subject: omap: mmc: extended to pass host capabilities from board file wires variable is renamed, extended and this single variable to be used to pass the platform capabilities, e.g DDR mode. Also removed the hardcoded value was using as bus-width. Signed-off-by: Sukumar Ghorai Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/mmc.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h index 9b89ec601ee2..4f819fc261b7 100644 --- a/arch/arm/plat-omap/include/plat/mmc.h +++ b/arch/arm/plat-omap/include/plat/mmc.h @@ -73,10 +73,9 @@ struct omap_mmc_platform_data { struct omap_mmc_slot_data { - /* 4 wire signaling is optional, and is used for SD/SDIO/HSMMC; - * 8 wire signaling is also optional, and is used with HSMMC - */ - u8 wires; + /* 4/8 wires and any additional host capabilities + * need to OR'd all capabilities (ref. linux/mmc/host.h) */ + u32 caps; /* * nomux means "standard" muxing is wrong on this board, and -- cgit v1.2.1 From bb722f33e233c980159f0ac5560d530eb5dfdd0f Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Mon, 27 Sep 2010 14:02:56 -0600 Subject: OMAP4: powerdomain: Update DSS logic state for ES2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit DSS on ES2 supports only OSWR, hence remove the support for CSWR from the powerdomain framework. Signed-off-by: Rajendra Nayak Signed-off-by: Benoît Cousson Signed-off-by: Paul Walmsley Cc: Kevin Hilman --- arch/arm/plat-omap/include/plat/powerdomain.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h index fb6ec74fe39e..3ea722072e2f 100644 --- a/arch/arm/plat-omap/include/plat/powerdomain.h +++ b/arch/arm/plat-omap/include/plat/powerdomain.h @@ -32,6 +32,7 @@ /* Powerdomain allowable state bitfields */ #define PWRSTS_ON (1 << PWRDM_POWER_ON) +#define PWRSTS_OFF (1 << PWRDM_POWER_OFF) #define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ (1 << PWRDM_POWER_ON)) -- cgit v1.2.1 From 0c3492467c99f3d0d83a48012ee6e672b016759c Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 27 Sep 2010 14:02:57 -0600 Subject: omap4: control: Add ctrl_pad_base to omap_globals On omap4 control module is divided in four IP blocks. - CTRL_MODULE_CORE 0x4a002000 - CTRL_MODULE_PAD_CORE 0x4a100000 - CTRL_MODULE_WKUP 0x4a30c000 - CTRL_MODULE_PAD_WKUP 0x4a31e000 Addressing all the modules with single base address is not possible considering 16 bit offsets. The mux code manages the pad core and pad wakeup related base address inside the mux framework. For other usage only control core and control pad bases are necessary. So this patch maps only needed pad control base address which is used by device drivers and infrastructure code The main control core base is still kept same in this patch to keep git-bisect working. This will be fixed in the relevant patch in this series. Signed-off-by: Benoit Cousson Signed-off-by: Santosh Shilimkar Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/include/plat/common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 9776b41ad76f..7cd01807c1e0 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -47,6 +47,7 @@ struct omap_globals { unsigned long sdrc; /* SDRAM Controller */ unsigned long sms; /* SDRAM Memory Scheduler */ unsigned long ctrl; /* System Control Module */ + unsigned long ctrl_pad; /* PAD Control Module */ unsigned long prm; /* Power and Reset Management */ unsigned long cm; /* Clock Management */ unsigned long cm2; -- cgit v1.2.1 From 70ba71a25e02ef7b8796723c8615955620e465ff Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 27 Sep 2010 14:02:57 -0600 Subject: omap4: control: Add accessor api's for pad control module On OMAP4 control pad are not addressable from control core base. So the common omap_ctrl_read/write APIs breaks Hence export separate APIs to manage the omap4 pad control registers. This APIs will work only for OMAP4 Signed-off-by: Santosh Shilimkar Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/include/plat/control.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 131bf405c2f6..2916b7e9372f 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h @@ -354,9 +354,11 @@ extern void __iomem *omap_ctrl_base_get(void); extern u8 omap_ctrl_readb(u16 offset); extern u16 omap_ctrl_readw(u16 offset); extern u32 omap_ctrl_readl(u16 offset); +extern u32 omap4_ctrl_pad_readl(u16 offset); extern void omap_ctrl_writeb(u8 val, u16 offset); extern void omap_ctrl_writew(u16 val, u16 offset); extern void omap_ctrl_writel(u32 val, u16 offset); +extern void omap4_ctrl_pad_writel(u32 val, u16 offset); extern void omap3_save_scratchpad_contents(void); extern void omap3_clear_scratchpad_contents(void); @@ -371,9 +373,11 @@ extern void omap3_control_restore_context(void); #define omap_ctrl_readb(x) 0 #define omap_ctrl_readw(x) 0 #define omap_ctrl_readl(x) 0 +#define omap4_ctrl_pad_readl(x) 0 #define omap_ctrl_writeb(x, y) WARN_ON(1) #define omap_ctrl_writew(x, y) WARN_ON(1) #define omap_ctrl_writel(x, y) WARN_ON(1) +#define omap4_ctrl_pad_writel(x, y) WARN_ON(1) #endif #endif /* __ASSEMBLY__ */ -- cgit v1.2.1 From 802edcb7a9227ad98e902ad4406c4b99ddf18c13 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 27 Sep 2010 14:02:58 -0600 Subject: omap4: control: Add the register definition headers On OMAP4, control module is divided into 4 separate IPs - OMAP44XX_CTRL_MODULE_CORE - OMAP44XX_CTRL_MODULE_PAD_CORE - OMAP44XX_CTRL_MODULE_WKUP - OMAP44XX_CTRL_MODULE_PAD_WKUP This patch adds all the omap4 control module register data and includes them in the common control.h The register data is autogenerated from the codebase thanks to Benoit Cousson efforts Signed-off-by: Benoit Cousson Signed-off-by: Santosh Shilimkar Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/include/plat/control.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 2916b7e9372f..f571af750b44 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h @@ -17,6 +17,10 @@ #define __ASM_ARCH_CONTROL_H #include +#include +#include +#include +#include #ifndef __ASSEMBLY__ #define OMAP242X_CTRL_REGADDR(reg) \ -- cgit v1.2.1 From dcf5ef3f42fbc0c62043b4c466d679fca32f1b9f Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 27 Sep 2010 14:02:58 -0600 Subject: omap4: control: Fix the control module register accesses This patch has multiple fixes together. To ensure that git bisect work across commits, all changes are clubbed together 1. Move the common control base address to control core 2. Remove the manually coeded defines and use the ones from headers. 3. Fix the the status register define in id.c for OMAP4 4. Fix all the register define in hsmmc.c 5. Use the control pad accessor API for omap4 hsmmc register accesses Signed-off-by: Benoit Cousson Signed-off-by: Santosh Shilimkar Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/include/plat/control.h | 23 ----------------------- 1 file changed, 23 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index f571af750b44..19c9b2a82046 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h @@ -208,12 +208,6 @@ #define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 #define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 -/* 44xx control status register offset */ -#define OMAP44XX_CONTROL_STATUS 0x2c4 - -/* 44xx-only CONTROL_GENERAL register offsets */ -#define OMAP44XX_CONTROL_MMC1 0x628 -#define OMAP44XX_CONTROL_PBIAS_LITE 0x600 /* * REVISIT: This list of registers is not comprehensive - there are more * that should be added. @@ -259,23 +253,6 @@ #define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) #define OMAP2_PBIASLITEVMODE0 (1 << 0) -/* CONTROL_PBIAS_LITE bits for OMAP4 */ -#define OMAP4_MMC1_PWRDNZ (1 << 26) -#define OMAP4_MMC1_PBIASLITE_HIZ_MODE (1 << 25) -#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT (1 << 24) -#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR (1 << 23) -#define OMAP4_MMC1_PBIASLITE_PWRDNZ (1 << 22) -#define OMAP4_MMC1_PBIASLITE_VMODE (1 << 21) -#define OMAP4_USBC1_ICUSB_PWRDNZ (1 << 20) - -#define OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP0 (1 << 31) -#define OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP1 (1 << 30) -#define OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP2 (1 << 29) -#define OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP3 (1 << 28) -#define OMAP4_CONTROL_SDMMC1_DR0_SPEEDCTRL (1 << 27) -#define OMAP4_CONTROL_SDMMC1_DR1_SPEEDCTRL (1 << 26) -#define OMAP4_CONTROL_SDMMC1_DR2_SPEEDCTRL (1 << 25) - /* CONTROL_PROG_IO1 bits */ #define OMAP3630_PRG_SDMMC1_SPEEDCTRL (1 << 20) -- cgit v1.2.1 From d04b620e6e6e72a95b7b88ccb7b002cb8f6b8113 Mon Sep 17 00:00:00 2001 From: Igor Grinberg Date: Tue, 21 Sep 2010 16:03:09 +0000 Subject: omap3: Introduce CompuLab CM-T3517 module Add basic suppot, enable uart and led. Signed-off-by: Igor Grinberg Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/uncompress.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index 57dffa7e3ea6..ab60b3560b33 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h @@ -142,6 +142,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id) /* omap3 based boards using UART3 */ DEBUG_LL_OMAP3(3, cm_t35); + DEBUG_LL_OMAP3(3, cm_t3517); DEBUG_LL_OMAP3(3, igep0020); DEBUG_LL_OMAP3(3, nokia_rx51); DEBUG_LL_OMAP3(3, omap3517evm); -- cgit v1.2.1 From d40f3f15d31e93fce3960d90caaa5a40b52494e8 Mon Sep 17 00:00:00 2001 From: Tim Nordell Date: Mon, 27 Sep 2010 16:05:47 +0000 Subject: ARM: OMAP3LOGIC: Adding LogicPD OMAP3 board support Adding support for LogicPD's OMAP 3530 LV SOM and OMAP 35x Torpedo board. Signed-off-by: Tim Nordell Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/uncompress.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index ab60b3560b33..2769395b4ea4 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h @@ -139,6 +139,8 @@ static inline void __arch_decomp_setup(unsigned long arch_id) DEBUG_LL_OMAP2(1, omap3evm); DEBUG_LL_OMAP3(1, omap_3430sdp); DEBUG_LL_OMAP3(1, omap_3630sdp); + DEBUG_LL_OMAP3(1, omap3530_lv_som); + DEBUG_LL_OMAP3(1, omap3_torpedo); /* omap3 based boards using UART3 */ DEBUG_LL_OMAP3(3, cm_t35); -- cgit v1.2.1 From cdd280b9958d71ccbaf7c00c0d63dab0a48c1db0 Mon Sep 17 00:00:00 2001 From: Tim Nordell Date: Mon, 27 Sep 2010 16:05:49 +0000 Subject: ARM: OMAP3LOGIC: Add generic smsc911x support when connected to GPMC Introduce of a generic way to setup smsc911x based Ethernet controller connected to GPMC similar to gpmc-smc91x but without timing setup. Signed-off-by: Tim Nordell Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/gpmc-smsc911x.h | 35 +++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 arch/arm/plat-omap/include/plat/gpmc-smsc911x.h (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h b/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h new file mode 100644 index 000000000000..872de0bf1e6b --- /dev/null +++ b/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h @@ -0,0 +1,35 @@ +/* + * arch/arm/plat-omap/include/plat/gpmc-smsc911x.h + * + * Copyright (C) 2009 Li-Pro.Net + * Stephan Linz + * + * Modified from arch/arm/plat-omap/include/plat/gpmc-smc91x.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_OMAP_GPMC_SMSC911X_H__ + +struct omap_smsc911x_platform_data { + int cs; + int gpio_irq; + int gpio_reset; + u32 flags; +}; + +#if defined(CONFIG_SMSC911X) || \ + defined(CONFIG_SMSC911X_MODULE) + +extern void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d); + +#else + +static inline void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d) +{ +} + +#endif +#endif -- cgit v1.2.1 From 046465b76a41a32a8d56e691b167fb9ba7729970 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 27 Sep 2010 20:19:30 +0530 Subject: OMAP2/3: UART: add omap_hwmod data for UARTs 1-4 This patch adds omap_hwmod data for UARTs on OMAP2 and OMAP3 platforms. UART4 support for 3630 and OMAP2 hwmod data added by Govindraj R. Signed-off-by: Govindraj.R Signed-off-by: Kevin Hilman --- arch/arm/plat-omap/include/plat/dma.h | 2 ++ arch/arm/plat-omap/include/plat/irqs.h | 2 ++ 2 files changed, 4 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h index af3a03941add..098f154f5d41 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h @@ -319,6 +319,8 @@ #define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ #define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ +#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */ +#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */ /*----------------------------------------------------------------------------*/ #define OMAP1_DMA_TOUT_IRQ (1 << 0) diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index c01d9f08a198..65e20a686713 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h @@ -345,6 +345,8 @@ #define INT_34XX_MMC3_IRQ 94 #define INT_34XX_GPT12_IRQ 95 +#define INT_36XX_UART4_IRQ 80 + #define INT_35XX_HECC0_IRQ 24 #define INT_35XX_HECC1_IRQ 28 #define INT_35XX_EMAC_C0_RXTHRESH_IRQ 67 -- cgit v1.2.1 From c04ede382a64020f19e9aa23a85493a09af945d3 Mon Sep 17 00:00:00 2001 From: "Govindraj.R" Date: Mon, 27 Sep 2010 20:19:46 +0530 Subject: OMAP2: UART: remove set_uart_globals Remove set_uart_globals function as this will not be needed as physical address for uarts will be taken from hwmod data file. Signed-off-by: Govindraj.R Signed-off-by: Kevin Hilman --- arch/arm/plat-omap/include/plat/common.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 2d8f98d7ae50..a9d69a09920d 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -67,7 +67,6 @@ void omap2_set_globals_tap(struct omap_globals *); void omap2_set_globals_sdrc(struct omap_globals *); void omap2_set_globals_control(struct omap_globals *); void omap2_set_globals_prcm(struct omap_globals *); -void omap2_set_globals_uart(struct omap_globals *); void omap3_map_io(void); -- cgit v1.2.1 From b612633b5928077441b979471869753bfa93d41a Mon Sep 17 00:00:00 2001 From: "Govindraj.R" Date: Mon, 27 Sep 2010 20:20:49 +0530 Subject: serial: Add OMAP high-speed UART driver This patch adds driver support for OMAP2/3/4 high speed UART. The driver is made separate from 8250 driver as we cannot over load 8250 driver with omap platform specific configuration for features like DMA, it makes easier to implement features like DMA and hardware flow control and software flow control configuration with this driver as required for the omap-platform. This patch involves only the core driver and its dependent. Cc: Tony Lindgren Signed-off-by: Govindraj.R Acked-by: Alan Cox Acked-by: Greg Kroah-Hartman Signed-off-by: Kevin Hilman --- arch/arm/plat-omap/include/plat/omap-serial.h | 129 ++++++++++++++++++++++++++ 1 file changed, 129 insertions(+) create mode 100644 arch/arm/plat-omap/include/plat/omap-serial.h (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h new file mode 100644 index 000000000000..0d6f076cf748 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -0,0 +1,129 @@ +/* + * Driver for OMAP-UART controller. + * Based on drivers/serial/8250.c + * + * Copyright (C) 2010 Texas Instruments. + * + * Authors: + * Govindraj R + * Thara Gopinath + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __OMAP_SERIAL_H__ +#define __OMAP_SERIAL_H__ + +#include +#include + +#include +#include + +#define DRIVER_NAME "omap-hsuart" + +/* + * Use tty device name as ttyO, [O -> OMAP] + * in bootargs we specify as console=ttyO0 if uart1 + * is used as console uart. + */ +#define OMAP_SERIAL_NAME "ttyO" + +#define OMAP_MDR1_DISABLE 0x07 +#define OMAP_MDR1_MODE13X 0x03 +#define OMAP_MDR1_MODE16X 0x00 +#define OMAP_MODE13X_SPEED 230400 + +/* + * LCR = 0XBF: Switch to Configuration Mode B. + * In configuration mode b allow access + * to EFR,DLL,DLH. + * Reference OMAP TRM Chapter 17 + * Section: 1.4.3 Mode Selection + */ +#define OMAP_UART_LCR_CONF_MDB 0XBF + +/* WER = 0x7F + * Enable module level wakeup in WER reg + */ +#define OMAP_UART_WER_MOD_WKUP 0X7F + +/* Enable XON/XOFF flow control on output */ +#define OMAP_UART_SW_TX 0x04 + +/* Enable XON/XOFF flow control on input */ +#define OMAP_UART_SW_RX 0x04 + +#define OMAP_UART_SYSC_RESET 0X07 +#define OMAP_UART_TCR_TRIG 0X0F +#define OMAP_UART_SW_CLR 0XF0 +#define OMAP_UART_FIFO_CLR 0X06 + +#define OMAP_UART_DMA_CH_FREE -1 + +#define RX_TIMEOUT (3 * HZ) +#define OMAP_MAX_HSUART_PORTS 4 + +#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA + +struct omap_uart_port_info { + bool dma_enabled; /* To specify DMA Mode */ + unsigned int uartclk; /* UART clock rate */ + void __iomem *membase; /* ioremap cookie or NULL */ + resource_size_t mapbase; /* resource base */ + unsigned long irqflags; /* request_irq flags */ + upf_t flags; /* UPF_* flags */ +}; + +struct uart_omap_dma { + u8 uart_dma_tx; + u8 uart_dma_rx; + int rx_dma_channel; + int tx_dma_channel; + dma_addr_t rx_buf_dma_phys; + dma_addr_t tx_buf_dma_phys; + unsigned int uart_base; + /* + * Buffer for rx dma.It is not required for tx because the buffer + * comes from port structure. + */ + unsigned char *rx_buf; + unsigned int prev_rx_dma_pos; + int tx_buf_size; + int tx_dma_used; + int rx_dma_used; + spinlock_t tx_lock; + spinlock_t rx_lock; + /* timer to poll activity on rx dma */ + struct timer_list rx_timer; + int rx_buf_size; + int rx_timeout; +}; + +struct uart_omap_port { + struct uart_port port; + struct uart_omap_dma uart_dma; + struct platform_device *pdev; + + unsigned char ier; + unsigned char lcr; + unsigned char mcr; + unsigned char fcr; + unsigned char efr; + + int use_dma; + /* + * Some bits in registers are cleared on a read, so they must + * be saved whenever the register is read but the bits will not + * be immediately processed. + */ + unsigned int lsr_break_flag; + unsigned char msr_saved_flags; + char name[20]; + unsigned long port_activity; +}; + +#endif /* __OMAP_SERIAL_H__ */ -- cgit v1.2.1 From 76abab213587bfc3b850f36c0a674116d161148d Mon Sep 17 00:00:00 2001 From: Sanjeev Premi Date: Fri, 1 Oct 2010 16:35:24 -0700 Subject: omap2/3: Update revision identification The existing definitions for cpu revision used upper nibble in the bits[15:08]. With OMAP3630, definitions use lower nibble. This patch unifies the definitions to start at lower nibble. Signed-off-by: Sanjeev Premi Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/cpu.h | 36 +++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 9b38e4bddf57..3fd8b4055727 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -68,10 +68,9 @@ unsigned int omap_rev(void); #define OMAP_REVBITS_00 0x00 #define OMAP_REVBITS_01 0x01 #define OMAP_REVBITS_02 0x02 -#define OMAP_REVBITS_10 0x10 -#define OMAP_REVBITS_20 0x20 -#define OMAP_REVBITS_30 0x30 -#define OMAP_REVBITS_40 0x40 +#define OMAP_REVBITS_03 0x03 +#define OMAP_REVBITS_04 0x04 +#define OMAP_REVBITS_05 0x05 /* * Get the CPU revision for OMAP devices @@ -363,23 +362,24 @@ IS_OMAP_TYPE(3517, 0x3517) /* Various silicon revisions for omap2 */ #define OMAP242X_CLASS 0x24200024 -#define OMAP2420_REV_ES1_0 0x24200024 -#define OMAP2420_REV_ES2_0 0x24201024 +#define OMAP2420_REV_ES1_0 OMAP242X_CLASS +#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (OMAP_REVBITS_01 << 8)) #define OMAP243X_CLASS 0x24300024 -#define OMAP2430_REV_ES1_0 0x24300024 +#define OMAP2430_REV_ES1_0 OMAP243X_CLASS #define OMAP343X_CLASS 0x34300034 -#define OMAP3430_REV_ES1_0 0x34300034 -#define OMAP3430_REV_ES2_0 0x34301034 -#define OMAP3430_REV_ES2_1 0x34302034 -#define OMAP3430_REV_ES3_0 0x34303034 -#define OMAP3430_REV_ES3_1 0x34304034 -#define OMAP3430_REV_ES3_1_2 0x34305034 - -#define OMAP3630_REV_ES1_0 0x36300034 -#define OMAP3630_REV_ES1_1 0x36300134 -#define OMAP3630_REV_ES1_2 0x36300234 +#define OMAP3430_REV_ES1_0 OMAP343X_CLASS +#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (OMAP_REVBITS_01 << 8)) +#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (OMAP_REVBITS_02 << 8)) +#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (OMAP_REVBITS_03 << 8)) +#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (OMAP_REVBITS_04 << 8)) +#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (OMAP_REVBITS_05 << 8)) + +#define OMAP363X_CLASS 0x36300034 +#define OMAP3630_REV_ES1_0 OMAP363X_CLASS +#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (OMAP_REVBITS_01 << 8)) +#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8)) #define OMAP35XX_CLASS 0x35000034 #define OMAP3503_REV(v) (OMAP35XX_CLASS | (0x3503 << 16) | (v << 8)) @@ -390,7 +390,7 @@ IS_OMAP_TYPE(3517, 0x3517) #define OMAP3517_REV(v) (OMAP35XX_CLASS | (0x3517 << 16) | (v << 8)) #define OMAP443X_CLASS 0x44300044 -#define OMAP4430_REV_ES1_0 0x44300044 +#define OMAP4430_REV_ES1_0 OMAP443X_CLASS #define OMAP4430_REV_ES2_0 0x44301044 /* -- cgit v1.2.1 From 07ad64b60c4d1f2bdbefa5db29ccb235596bc670 Mon Sep 17 00:00:00 2001 From: Madhusudhan Chikkature Date: Fri, 1 Oct 2010 16:35:25 -0700 Subject: OMAP4 ES2: HSMMC soft reset change The omap4 es2 hsmmc has a updated soft reset logic.After the reset is issued monitor a 0->1 transition first. The reset of CMD or DATA lines is complete only after a 0->1->0 transition of SRC or SRD bits. Signed-off-by: Madhusudhan Chikkature Tested-by: Anand Gadiyar Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/mmc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h index 4f819fc261b7..2c4629a8d9f2 100644 --- a/arch/arm/plat-omap/include/plat/mmc.h +++ b/arch/arm/plat-omap/include/plat/mmc.h @@ -103,6 +103,7 @@ struct omap_mmc_platform_data { /* we can put the features above into this variable */ #define HSMMC_HAS_PBIAS (1 << 0) +#define HSMMC_HAS_UPDATED_RESET (1 << 1) unsigned features; int switch_pin; /* gpio (card detect) */ -- cgit v1.2.1 From 91a0b089f8358aec866bc9c69da8b84c77beaaf3 Mon Sep 17 00:00:00 2001 From: kishore kadiyala Date: Fri, 1 Oct 2010 16:35:28 -0700 Subject: omap4 hsmmc: Register offset handling In OMAP4, as per new PM programming model, the legacy registers which were there in OMAP3 are all shifted by 0x100 while new one's are added from offset 0 to 0x10. For OMAP4, the register offset appending of 0x100 done in devices.c currently, is moved to driver file.This change fits in for current implementation as well as once the driver undergoes hwmod adaptation. Cc: Andrew Morton Cc: Madhusudhan Chikkature Cc: Adrian Hunter Cc: Benoit Cousson Signed-off-by: Kishore Kadiyala Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/mmc.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h index 2c4629a8d9f2..0ce3099b1eb0 100644 --- a/arch/arm/plat-omap/include/plat/mmc.h +++ b/arch/arm/plat-omap/include/plat/mmc.h @@ -71,6 +71,9 @@ struct omap_mmc_platform_data { u64 dma_mask; + /* Register offset deviation */ + u16 reg_offset; + struct omap_mmc_slot_data { /* 4/8 wires and any additional host capabilities -- cgit v1.2.1 From 63509e3c03ae22000c642e33b5006769d1b5db86 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 4 Oct 2010 16:58:01 -0700 Subject: omap: Keep nwires for omap1 and 2420 MMC controller A patch from Sukumar Ghorai changed the nwires to use caps instead. However, nwires is still needed for the earlier controller. Signed-off-by: Tony Lindgren Acked-by: Sukumar Ghorai Signed-off-by: Ming Lei --- arch/arm/plat-omap/include/plat/mmc.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h index 4f819fc261b7..c5f35f87deaa 100644 --- a/arch/arm/plat-omap/include/plat/mmc.h +++ b/arch/arm/plat-omap/include/plat/mmc.h @@ -73,9 +73,12 @@ struct omap_mmc_platform_data { struct omap_mmc_slot_data { - /* 4/8 wires and any additional host capabilities - * need to OR'd all capabilities (ref. linux/mmc/host.h) */ - u32 caps; + /* + * 4/8 wires and any additional host capabilities + * need to OR'd all capabilities (ref. linux/mmc/host.h) + */ + u8 wires; /* Used for the MMC driver on omap1 and 2420 */ + u32 caps; /* Used for the MMC driver on 2430 and later */ /* * nomux means "standard" muxing is wrong on this board, and -- cgit v1.2.1 From 38815733972655ee3cbfc34e254c403c332693c3 Mon Sep 17 00:00:00 2001 From: Manjunath Kondaiah G Date: Fri, 8 Oct 2010 09:56:37 -0700 Subject: OMAP: mach-omap2: Fix static declaration warnings This patch fixes sparse warnings due to non declaration of static structures and variables. Sparse warning logs fixed: arch/arm/mach-omap2/control.c:88:6: warning: symbol 'omap3_secure_ram_storage' was not declared. Should it be static? n arch/arm/mach-omap2/timer-gp.c:50:22: warning: symbol 'gptimer_wakeup' was not declared. Should it be static? arch/arm/mach-omap2/timer-gp.c:240:18: warning: symbol 'omap_timer' was not declared. Should it be static? arch/arm/mach-omap2/prcm.c:121:24: warning: symbol 'prcm_context' was not declared. Should it be static? arch/arm/mach-omap2/mux2420.c:510:29: warning: symbol 'omap2420_pop_ball' was not declared. Should it be static? arch/arm/mach-omap2/mux2430.c:589:29: warning: symbol 'omap2430_pop_ball' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:934:28: warning: symbol 'omap3_cus_subset' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1080:29: warning: symbol 'omap3_cus_ball' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1272:28: warning: symbol 'omap3_cbb_subset' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1393:29: warning: symbol 'omap3_cbb_ball' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1603:28: warning: symbol 'omap36xx_cbp_subset' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1821:29: warning: symbol 'omap36xx_cbp_ball' was not declared. Should it be static? arch/arm/mach-omap2/pm-debug.c:165:15: warning: symbol 'pm_dbg_dir' was not declared. Should it be static? arch/arm/mach-omap2/board-omap3evm.c:587:30: warning: symbol 'ads7846_config' was not declared. Should it be static? arch/arm/mach-omap2/board-omap3evm.c:606:23: warning: symbol 'omap3evm_spi_board_info' was not declared. Should it be static? arch/arm/mach-omap2/board-rx51-sdram.c:46:25: warning: symbol 'rx51_sdrc_params' was not declared. Should it be static? arch/arm/mach-omap2/board-rx51-sdram.c:211:25: warning: symbol 'rx51_get_sdram_timings' was not declared. Should it be static? arch/arm/mach-omap2/board-omap3touchbook.c:64:15: warning: symbol 'touchbook_revision' was not declared. Should it be static? arch/arm/mach-omap2/board-am3517evm.c:350:24: warning: symbol 'am3517_evm_dss_device' was not declared. Should it be static? arch/arm/mach-omap2/board-omap3stalker.c:567:23: warning: symbol 'omap3stalker_spi_board_info' was not declared. Should it be static? Signed-off-by: Manjunath Kondaiah G Cc: linux-arm-kernel@lists.infradead.org Cc: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/dmtimer.h | 2 ++ arch/arm/plat-omap/include/plat/sdrc.h | 1 + 2 files changed, 3 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 20f1054c0a80..dfa3aff9761b 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -45,6 +45,8 @@ #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 struct omap_dm_timer; +extern struct omap_dm_timer *gptimer_wakeup; +extern struct sys_timer omap_timer; struct clk; int omap_dm_timer_init(void); diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h index 7b76f50564ba..efd87c8dda69 100644 --- a/arch/arm/plat-omap/include/plat/sdrc.h +++ b/arch/arm/plat-omap/include/plat/sdrc.h @@ -147,6 +147,7 @@ struct memory_timings { }; extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode); +struct omap_sdrc_params *rx51_get_sdram_timings(void); u32 omap2xxx_sdrc_dll_is_unlocked(void); u32 omap2xxx_sdrc_reprogram(u32 level, u32 force); -- cgit v1.2.1 From 04aeae777945df0e3e37d968d211c821c7458cc5 Mon Sep 17 00:00:00 2001 From: Manjunath Kondaiah G Date: Fri, 8 Oct 2010 09:58:35 -0700 Subject: OMAP2plus: Fix static function warnings This patch fixes sparse warnings due non declarations of static functions. arch/arm/mach-omap2/timer-gp.c:115:12: warning: symbol 'omap2_gp_clockevent_set_gptimer' was not declared. Should it be static? arch/arm/mach-omap2/powerdomain.c:993:5: warning: symbol 'pwrdm_set_lowpwrstchange' was not declared. Should it be static? arch/arm/mach-omap2/board-flash.c:141:8: warning: symbol 'board_nand_init' was not declared. Should it be static? arch/arm/mach-omap2/board-n8x0.c:416:6: warning: symbol 'n8x0_mmc_slot1_cover_handler' was not declared. Should it be static? arch/arm/mach-omap2/board-n8x0.c:544:13: warning: symbol 'n8x0_mmc_init' was not declared. Should it be static? arch/arm/mach-omap2/board-rx51-peripherals.c:902:13: warning: symbol 'rx51_peripherals_init' was not declared. Should it be static? arch/arm/mach-omap2/board-rx51-video.c:107:13: warning: symbol 'rx51_video_mem_init' was not declared. Should it be static? arch/arm/mach-omap2/board-zoom-debugboard.c:155:12: warning: symbol 'zoom_debugboard_init' was not declared. Should it be static? arch/arm/mach-omap2/board-zoom-peripherals.c:280:13: warning: symbol 'zoom_peripherals_init' was not declared. Should it be static? arch/arm/mach-omap2/board-igep0020.c:110:13: warning: symbol 'igep2_flash_init' was not declared. Should it be static? arch/arm/mach-omap2/board-am3517evm.c:109:6: warning: symbol 'am3517_evm_ethernet_init' was not declared. Should it be static? drivers/mtd/onenand/omap2.c:577:5: warning: symbol 'omap2_onenand_rephase' was not declared. Should it be static? Signed-off-by: Manjunath Kondaiah G Cc: linux-arm-kernel@lists.infradead.org Cc: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/powerdomain.h | 1 + arch/arm/plat-omap/include/plat/timer-gp.h | 17 ----------------- 2 files changed, 1 insertion(+), 17 deletions(-) delete mode 100644 arch/arm/plat-omap/include/plat/timer-gp.h (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h index 3ea722072e2f..9ca420dcd2f8 100644 --- a/arch/arm/plat-omap/include/plat/powerdomain.h +++ b/arch/arm/plat-omap/include/plat/powerdomain.h @@ -162,5 +162,6 @@ int pwrdm_state_switch(struct powerdomain *pwrdm); int pwrdm_clkdm_state_switch(struct clockdomain *clkdm); int pwrdm_pre_transition(void); int pwrdm_post_transition(void); +int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm); #endif diff --git a/arch/arm/plat-omap/include/plat/timer-gp.h b/arch/arm/plat-omap/include/plat/timer-gp.h deleted file mode 100644 index c88d346b59d9..000000000000 --- a/arch/arm/plat-omap/include/plat/timer-gp.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * OMAP2/3 GPTIMER support.headers - * - * Copyright (C) 2009 Nokia Corporation - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H -#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H - -int __init omap2_gp_clockevent_set_gptimer(u8 id); - -#endif - -- cgit v1.2.1 From b0a330dc5eff6b27cce3b7b5dbea9379d969f73e Mon Sep 17 00:00:00 2001 From: Manjunath Kondaiah G Date: Fri, 8 Oct 2010 10:00:19 -0700 Subject: OMAP: plat-omap: Fix static function warnings This patch fixes sparse warnings due non declarations of static functions. arch/arm/plat-omap/sram.c:130:13: warning: symbol 'omap_detect_sram' was not declared. Should it be static? arch/arm/plat-omap/sram.c:216:13: warning: symbol 'omap_map_sram' was not declared. Should it be static? arch/arm/plat-omap/sram.c:450:12: warning: symbol 'omap_sram_init' was not declared. Should it be static? arch/arm/plat-omap/sram.c:348:12: warning: symbol 'omap242x_sram_init' was not declared. Should it be static? arch/arm/plat-omap/sram.c:369:12: warning: symbol 'omap243x_sram_init' was not declared. Should it be static? arch/arm/plat-omap/sram.c:425:12: warning: symbol 'omap34xx_sram_init' was not declared. Should it be static? arch/arm/plat-omap/sram.c:441:12: warning: symbol 'omap44xx_sram_init' was not declared. Should it be static arch/arm/plat-omap/mcbsp.c:36:6: warning: symbol 'omap_mcbsp_write' was not declared. Should it be static? arch/arm/plat-omap/mcbsp.c:50:5: warning: symbol 'omap_mcbsp_read' was not declared. Should it be static? arch/arm/plat-omap/mcbsp.c:65:6: warning: symbol 'omap_mcbsp_st_write' was not declared. Should it be static? arch/arm/plat-omap/mcbsp.c:70:5: warning: symbol 'omap_mcbsp_st_read' was not declared. Should it be static? arch/arm/plat-omap/mcbsp.c:1648:15: warning: symbol 'omap_st_add' was not declared. Should it be static? arch/arm/plat-omap/fb.c:414:15: warning: symbol 'omapfb_reserve_sram' was not declared. Should it be static? arch/arm/plat-omap/cpu-omap.c:43:5: warning: symbol 'omap_verify_speed' was not declared. Should it be static? arch/arm/plat-omap/cpu-omap.c:61:14: warning: symbol 'omap_getspeed' was not declared. Should it be static? Signed-off-by: Manjunath Kondaiah G Cc: linux-arm-kernel@lists.infradead.org Cc: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/sram.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h index 16a1b458d53c..5905100b29a1 100644 --- a/arch/arm/plat-omap/include/plat/sram.h +++ b/arch/arm/plat-omap/include/plat/sram.h @@ -11,7 +11,6 @@ #ifndef __ARCH_ARM_OMAP_SRAM_H #define __ARCH_ARM_OMAP_SRAM_H -extern int __init omap_sram_init(void); extern void * omap_sram_push(void * start, unsigned long size); extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); -- cgit v1.2.1 From e844b1da87270d96aef3fc79763ecc2c6541a71b Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Fri, 8 Oct 2010 10:22:11 -0700 Subject: omap3: Add minimal OMAP3 IGEP module support The OMAP3 IGEP module is a low-power, high performance production-ready system-on-module (SOM) based on TI's OMAP3 family. More about this board at www.igep.es. Signed-off-by: Enric Balletbo i Serra [tony@atomide.com: updated for the mmc changes and to be selected by default] Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/uncompress.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index 2769395b4ea4..9036e374e0ac 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h @@ -146,6 +146,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id) DEBUG_LL_OMAP3(3, cm_t35); DEBUG_LL_OMAP3(3, cm_t3517); DEBUG_LL_OMAP3(3, igep0020); + DEBUG_LL_OMAP3(3, igep0030); DEBUG_LL_OMAP3(3, nokia_rx51); DEBUG_LL_OMAP3(3, omap3517evm); DEBUG_LL_OMAP3(3, omap3_beagle); -- cgit v1.2.1 From cc7a1d2a540a780066aa562c651a88dd28b6fc8a Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Fri, 8 Oct 2010 10:23:22 -0700 Subject: omap: hwmod: Handle modules with 16bit registers Some modules which have 16bit registers can cause imprecise aborts if a __raw_readl/writel is used to read/write 32 bits. Add an additional flag to identify modules which have such hard requirement, and handle it in the hwmod framework. Signed-off-by: Rajendra Nayak Acked-by: Paul Walmsley Tested-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/omap_hwmod.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index c1835afc238d..7eaa8edf3b14 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -370,6 +370,7 @@ struct omap_hwmod_omap4_prcm { * This is needed for devices like DSS that require optional clocks enabled * in order to complete the reset. Optional clocks will be disabled * again after the reset. + * HWMOD_16BIT_REG: Module has 16bit registers */ #define HWMOD_SWSUP_SIDLE (1 << 0) #define HWMOD_SWSUP_MSTANDBY (1 << 1) @@ -379,6 +380,7 @@ struct omap_hwmod_omap4_prcm { #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5) #define HWMOD_NO_IDLEST (1 << 6) #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) +#define HWMOD_16BIT_REG (1 << 8) /* * omap_hwmod._int_flags definitions @@ -527,8 +529,8 @@ int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode); int omap_hwmod_reset(struct omap_hwmod *oh); void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); -void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs); -u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs); +void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); +u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); int omap_hwmod_count_resources(struct omap_hwmod *oh); int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); -- cgit v1.2.1 From 54164bb2927edd9f183a108a0d037d80639c8429 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 8 Oct 2010 11:40:17 -0600 Subject: OMAP2420: CTRL: fix OMAP242X_CTRL_REGADDR macro Conform the OMAP2420_CTRL_BASE macro name to the standard of the rest of the OMAP*_CTRL_BASE macro names. This fixes a bug in the OMAP2420 SCM code that prevented OMAP242X_CTRL_REGADDR from working. Signed-off-by: Paul Walmsley --- arch/arm/plat-omap/include/plat/omap24xx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/omap24xx.h b/arch/arm/plat-omap/include/plat/omap24xx.h index 7055672a8c68..92df9e27cc5c 100644 --- a/arch/arm/plat-omap/include/plat/omap24xx.h +++ b/arch/arm/plat-omap/include/plat/omap24xx.h @@ -40,7 +40,7 @@ #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) #define OMAP24XX_IVA_INTC_BASE 0x40000000 -#define OMAP2420_CTRL_BASE L4_24XX_BASE +#define OMAP242X_CTRL_BASE L4_24XX_BASE #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000) #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000) -- cgit v1.2.1 From cf4c87abe238ec17cd0255b4e21abd949d7f811e Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 8 Oct 2010 11:40:19 -0600 Subject: OMAP: McBSP: implement McBSP CLKR and FSR signal muxing via mach-omap2/mcbsp.c The OMAP ASoC McBSP code implemented CLKR and FSR signal muxing via direct System Control Module writes on OMAP2+. This required the omap_ctrl_{read,write}l() functions to be exported, which is against policy: the only code that should call those functions directly is OMAP core code, not device drivers. omap_ctrl_{read,write}*() are no longer exported, so the driver no longer builds as a module. Fix the pinmuxing part of the problem by removing calls to omap_ctrl_{read,write}l() from the OMAP ASoC McBSP code and implementing signal muxing functions in arch/arm/mach-omap2/mcbsp.c. Due to the unfortunate way that McBSP support is implemented in ASoC and the OMAP tree, these symbols must be exported for use by sound/soc/omap/omap-mcbsp.c. Going forward, the McBSP device driver should be moved from arch/arm/*omap* into drivers/ or sound/soc/*, and the CPU DAI driver should be implemented as a platform_driver as many other ASoC CPU DAI drivers are. These two steps should resolve many of the layering problems, which will rapidly reappear during a McBSP hwmod/PM runtime conversion. Signed-off-by: Paul Walmsley Acked-by: Jarkko Nikula Acked-by: Peter Ujfalusi Acked-by: Liam Girdwood Acked-by: Mark Brown --- arch/arm/plat-omap/include/plat/control.h | 2 ++ arch/arm/plat-omap/include/plat/mcbsp.h | 13 ++++++++++++- 2 files changed, 14 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 19c9b2a82046..54b0c3529c83 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h @@ -223,6 +223,8 @@ #define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */ #define OMAP24XX_USBSTANDBYCTRL (1 << 15) #define OMAP2_MCBSP2_CLKS_MASK (1 << 6) +#define OMAP2_MCBSP1_FSR_MASK (1 << 4) +#define OMAP2_MCBSP1_CLKR_MASK (1 << 3) #define OMAP2_MCBSP1_CLKS_MASK (1 << 2) /* CONTROL_DEVCONF1 bits */ diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index b4ff6a11a8f2..886d0e610aa7 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -312,6 +312,14 @@ #define RFSREN 0x0002 #define RSYNCERREN 0x0001 +/* CLKR signal muxing options */ +#define CLKR_SRC_CLKR 0 +#define CLKR_SRC_CLKX 1 + +/* FSR signal muxing options */ +#define FSR_SRC_FSR 0 +#define FSR_SRC_FSX 1 + /* we don't do multichannel for now */ struct omap_mcbsp_reg_cfg { u16 spcr2; @@ -501,7 +509,6 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word); int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word); - /* SPI specific API */ void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg); @@ -510,6 +517,10 @@ int omap_mcbsp_pollread(unsigned int id, u16 * buf); int omap_mcbsp_pollwrite(unsigned int id, u16 buf); int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type); +/* McBSP signal muxing API */ +void omap2_mcbsp1_mux_clkr_src(u8 mux); +void omap2_mcbsp1_mux_fsr_src(u8 mux); + #ifdef CONFIG_ARCH_OMAP3 /* Sidetone specific API */ int omap_st_set_chgain(unsigned int id, int channel, s16 chgain); -- cgit v1.2.1 From d13586574d373ef40acd4725c9a269daa355e412 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 8 Oct 2010 11:40:19 -0600 Subject: OMAP: McBSP: implement functional clock switching via clock framework Previously the OMAP McBSP ASoC driver implemented CLKS switching by using omap_ctrl_{read,write}l() directly. This is against policy; the OMAP System Control Module functions are not intended to be exported to drivers. These symbols are no longer exported, so as a result, the OMAP McBSP ASoC driver does not build as a module. Resolve the CLKS clock changing portion of this problem by creating a clock parent changing function that lives in arch/arm/mach-omap2/mcbsp.c, and modify the ASoC driver to use it. Due to the unfortunate way that McBSP support is implemented in ASoC and the OMAP tree, this symbol must be exported for use by sound/soc/omap/omap-mcbsp.c. Going forward, the McBSP device driver should be moved from arch/arm/*omap* into drivers/ or sound/soc/* and the CPU DAI driver should be implemented as a platform_driver as many other ASoC CPU DAI drivers are. These two steps should resolve many of the layering problems, which will rapidly reappear during a McBSP hwmod/PM runtime conversions. Signed-off-by: Paul Walmsley Acked-by: Jarkko Nikula Acked-by: Peter Ujfalusi Acked-by: Liam Girdwood Acked-by: Mark Brown --- arch/arm/plat-omap/include/plat/mcbsp.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 886d0e610aa7..4da6f94ae8e8 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -320,6 +320,10 @@ #define FSR_SRC_FSR 0 #define FSR_SRC_FSX 1 +/* McBSP functional clock sources */ +#define MCBSP_CLKS_PAD_SRC 0 +#define MCBSP_CLKS_PRCM_SRC 1 + /* we don't do multichannel for now */ struct omap_mcbsp_reg_cfg { u16 spcr2; @@ -406,6 +410,7 @@ struct omap_mcbsp_spi_cfg { struct omap_mcbsp_ops { void (*request)(unsigned int); void (*free)(unsigned int); + int (*set_clks_src)(u8, u8); }; struct omap_mcbsp_platform_data { @@ -472,6 +477,9 @@ struct omap_mcbsp { extern struct omap_mcbsp **mcbsp_ptr; extern int omap_mcbsp_count, omap_mcbsp_cache_size; +#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) +#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; + int omap_mcbsp_init(void); void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, int size); @@ -509,6 +517,9 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word); int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word); + +/* McBSP functional clock source changing function */ +extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); /* SPI specific API */ void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg); -- cgit v1.2.1 From 4814ced5116e3b73dc4f63eec84999739fc8ed11 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 8 Oct 2010 11:40:20 -0600 Subject: OMAP: control: move plat-omap/control.h to mach-omap2/control.h Only OMAP2+ platforms have the System Control Module (SCM) IP block. In the past, we've kept the SCM header file in plat-omap. This has led to abuse - device drivers including it; includes being added that create implicit dependencies on OMAP2+ builds; etc. In response, move the SCM headers into mach-omap2/. As part of this, remove the direct SCM access from the OMAP UDC driver. It was clearly broken. The UDC code needs an indepth review for use on OMAP2+ chips. Signed-off-by: Paul Walmsley Cc: Cory Maccarrone Cc: Kyungmin Park --- arch/arm/plat-omap/include/plat/control.h | 368 -------------------------- arch/arm/plat-omap/include/plat/omap-serial.h | 1 - 2 files changed, 369 deletions(-) delete mode 100644 arch/arm/plat-omap/include/plat/control.h (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h deleted file mode 100644 index 54b0c3529c83..000000000000 --- a/arch/arm/plat-omap/include/plat/control.h +++ /dev/null @@ -1,368 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/control.h - * - * OMAP2/3/4 System Control Module definitions - * - * Copyright (C) 2007-2009 Texas Instruments, Inc. - * Copyright (C) 2007-2008 Nokia Corporation - * - * Written by Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_CONTROL_H -#define __ASM_ARCH_CONTROL_H - -#include -#include -#include -#include -#include - -#ifndef __ASSEMBLY__ -#define OMAP242X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) -#define OMAP243X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) -#define OMAP343X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) -#else -#define OMAP242X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) -#define OMAP243X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) -#define OMAP343X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) -#endif /* __ASSEMBLY__ */ - -/* - * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for - * OMAP24XX and OMAP34XX. - */ - -/* Control submodule offsets */ - -#define OMAP2_CONTROL_INTERFACE 0x000 -#define OMAP2_CONTROL_PADCONFS 0x030 -#define OMAP2_CONTROL_GENERAL 0x270 -#define OMAP343X_CONTROL_MEM_WKUP 0x600 -#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 -#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 - -/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ - -#define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10) - -/* CONTROL_GENERAL register offsets common to OMAP2 & 3 */ -#define OMAP2_CONTROL_DEVCONF0 (OMAP2_CONTROL_GENERAL + 0x0004) -#define OMAP2_CONTROL_MSUSPENDMUX_0 (OMAP2_CONTROL_GENERAL + 0x0020) -#define OMAP2_CONTROL_MSUSPENDMUX_1 (OMAP2_CONTROL_GENERAL + 0x0024) -#define OMAP2_CONTROL_MSUSPENDMUX_2 (OMAP2_CONTROL_GENERAL + 0x0028) -#define OMAP2_CONTROL_MSUSPENDMUX_3 (OMAP2_CONTROL_GENERAL + 0x002c) -#define OMAP2_CONTROL_MSUSPENDMUX_4 (OMAP2_CONTROL_GENERAL + 0x0030) -#define OMAP2_CONTROL_MSUSPENDMUX_5 (OMAP2_CONTROL_GENERAL + 0x0034) -#define OMAP2_CONTROL_SEC_CTRL (OMAP2_CONTROL_GENERAL + 0x0040) -#define OMAP2_CONTROL_RPUB_KEY_H_0 (OMAP2_CONTROL_GENERAL + 0x0090) -#define OMAP2_CONTROL_RPUB_KEY_H_1 (OMAP2_CONTROL_GENERAL + 0x0094) -#define OMAP2_CONTROL_RPUB_KEY_H_2 (OMAP2_CONTROL_GENERAL + 0x0098) -#define OMAP2_CONTROL_RPUB_KEY_H_3 (OMAP2_CONTROL_GENERAL + 0x009c) - -/* 242x-only CONTROL_GENERAL register offsets */ -#define OMAP242X_CONTROL_DEVCONF OMAP2_CONTROL_DEVCONF0 /* match TRM */ -#define OMAP242X_CONTROL_OCM_RAM_PERM (OMAP2_CONTROL_GENERAL + 0x0068) - -/* 243x-only CONTROL_GENERAL register offsets */ -/* CONTROL_IVA2_BOOT{ADDR,MOD} are at the same place on 343x - noted below */ -#define OMAP243X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0078) -#define OMAP243X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x007c) -#define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) -#define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) -#define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) -#define OMAP243X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x0230) - -/* 24xx-only CONTROL_GENERAL register offsets */ -#define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) -#define OMAP24XX_CONTROL_EMU_SUPPORT (OMAP2_CONTROL_GENERAL + 0x0008) -#define OMAP24XX_CONTROL_SEC_TEST (OMAP2_CONTROL_GENERAL + 0x0044) -#define OMAP24XX_CONTROL_PSA_CTRL (OMAP2_CONTROL_GENERAL + 0x0048) -#define OMAP24XX_CONTROL_PSA_CMD (OMAP2_CONTROL_GENERAL + 0x004c) -#define OMAP24XX_CONTROL_PSA_VALUE (OMAP2_CONTROL_GENERAL + 0x0050) -#define OMAP24XX_CONTROL_SEC_EMU (OMAP2_CONTROL_GENERAL + 0x0060) -#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064) -#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c) -#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070) -#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074) -#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) -#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) -#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088) -#define OMAP24XX_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x008c) -#define OMAP24XX_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a0) -#define OMAP24XX_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00a4) -#define OMAP24XX_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00a8) -#define OMAP24XX_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00ac) -#define OMAP24XX_CONTROL_CUST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00b0) -#define OMAP24XX_CONTROL_CUST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00b4) -#define OMAP24XX_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c0) -#define OMAP24XX_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00c4) -#define OMAP24XX_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00c8) -#define OMAP24XX_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00cc) -#define OMAP24XX_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d0) -#define OMAP24XX_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00d4) -#define OMAP24XX_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00d8) -#define OMAP24XX_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00dc) -#define OMAP24XX_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e0) -#define OMAP24XX_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00e4) - -#define OMAP343X_CONTROL_PADCONF_SYSNIRQ (OMAP2_CONTROL_INTERFACE + 0x01b0) - -/* 34xx-only CONTROL_GENERAL register offsets */ -#define OMAP343X_CONTROL_PADCONF_OFF (OMAP2_CONTROL_GENERAL + 0x0000) -#define OMAP343X_CONTROL_MEM_DFTRW0 (OMAP2_CONTROL_GENERAL + 0x0008) -#define OMAP343X_CONTROL_MEM_DFTRW1 (OMAP2_CONTROL_GENERAL + 0x000c) -#define OMAP343X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0068) -#define OMAP343X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x006c) -#define OMAP343X_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0070) -#define OMAP343X_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0074) -#define OMAP343X_CONTROL_SEC_ERR_STATUS_DEBUG (OMAP2_CONTROL_GENERAL + 0x0078) -#define OMAP343X_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) -#define OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) -#define OMAP343X_CONTROL_RPUB_KEY_H_4 (OMAP2_CONTROL_GENERAL + 0x00a0) -#define OMAP343X_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a8) -#define OMAP343X_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00ac) -#define OMAP343X_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00b0) -#define OMAP343X_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00b4) -#define OMAP343X_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c8) -#define OMAP343X_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00cc) -#define OMAP343X_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00d0) -#define OMAP343X_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00d4) -#define OMAP343X_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d8) -#define OMAP343X_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00dc) -#define OMAP343X_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00e0) -#define OMAP343X_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00e4) -#define OMAP343X_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e8) -#define OMAP343X_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00ec) -#define OMAP343X_CONTROL_TEST_KEY_10 (OMAP2_CONTROL_GENERAL + 0x00f0) -#define OMAP343X_CONTROL_TEST_KEY_11 (OMAP2_CONTROL_GENERAL + 0x00f4) -#define OMAP343X_CONTROL_TEST_KEY_12 (OMAP2_CONTROL_GENERAL + 0x00f8) -#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) -#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) -#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) -#define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ - + ((i) >> 1) * 4 + (!((i) & 1)) * 2) -#define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) -#define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) -#define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) -#define OMAP343X_CONTROL_CORE_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E4) -#define OMAP343X_CONTROL_PER_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E8) -#define OMAP343X_CONTROL_USBHOST_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01EC) -#define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02B0) -#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02B4) -#define OMAP343X_CONTROL_SRAMLDO4 (OMAP2_CONTROL_GENERAL + 0x02B8) -#define OMAP343X_CONTROL_SRAMLDO5 (OMAP2_CONTROL_GENERAL + 0x02C0) -#define OMAP343X_CONTROL_CSI (OMAP2_CONTROL_GENERAL + 0x02C4) - -/* AM35XX only CONTROL_GENERAL register offsets */ -#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038) -#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310) -#define AM35XX_CONTROL_DEVCONF3 (OMAP2_CONTROL_GENERAL + 0x0314) -#define AM35XX_CONTROL_CBA_PRIORITY (OMAP2_CONTROL_GENERAL + 0x0320) -#define AM35XX_CONTROL_LVL_INTR_CLEAR (OMAP2_CONTROL_GENERAL + 0x0324) -#define AM35XX_CONTROL_IP_SW_RESET (OMAP2_CONTROL_GENERAL + 0x0328) -#define AM35XX_CONTROL_IPSS_CLK_CTRL (OMAP2_CONTROL_GENERAL + 0x032C) - -/* 34xx PADCONF register offsets */ -#define OMAP343X_PADCONF_ETK(i) (OMAP2_CONTROL_PADCONFS + 0x5a8 + \ - (i)*2) -#define OMAP343X_PADCONF_ETK_CLK OMAP343X_PADCONF_ETK(0) -#define OMAP343X_PADCONF_ETK_CTL OMAP343X_PADCONF_ETK(1) -#define OMAP343X_PADCONF_ETK_D0 OMAP343X_PADCONF_ETK(2) -#define OMAP343X_PADCONF_ETK_D1 OMAP343X_PADCONF_ETK(3) -#define OMAP343X_PADCONF_ETK_D2 OMAP343X_PADCONF_ETK(4) -#define OMAP343X_PADCONF_ETK_D3 OMAP343X_PADCONF_ETK(5) -#define OMAP343X_PADCONF_ETK_D4 OMAP343X_PADCONF_ETK(6) -#define OMAP343X_PADCONF_ETK_D5 OMAP343X_PADCONF_ETK(7) -#define OMAP343X_PADCONF_ETK_D6 OMAP343X_PADCONF_ETK(8) -#define OMAP343X_PADCONF_ETK_D7 OMAP343X_PADCONF_ETK(9) -#define OMAP343X_PADCONF_ETK_D8 OMAP343X_PADCONF_ETK(10) -#define OMAP343X_PADCONF_ETK_D9 OMAP343X_PADCONF_ETK(11) -#define OMAP343X_PADCONF_ETK_D10 OMAP343X_PADCONF_ETK(12) -#define OMAP343X_PADCONF_ETK_D11 OMAP343X_PADCONF_ETK(13) -#define OMAP343X_PADCONF_ETK_D12 OMAP343X_PADCONF_ETK(14) -#define OMAP343X_PADCONF_ETK_D13 OMAP343X_PADCONF_ETK(15) -#define OMAP343X_PADCONF_ETK_D14 OMAP343X_PADCONF_ETK(16) -#define OMAP343X_PADCONF_ETK_D15 OMAP343X_PADCONF_ETK(17) - -/* 34xx GENERAL_WKUP regist offsets */ -#define OMAP343X_CONTROL_WKUP_DEBOBSMUX(i) (OMAP343X_CONTROL_GENERAL_WKUP + \ - 0x008 + (i)) -#define OMAP343X_CONTROL_WKUP_DEBOBS0 (OMAP343X_CONTROL_GENERAL_WKUP + 0x008) -#define OMAP343X_CONTROL_WKUP_DEBOBS1 (OMAP343X_CONTROL_GENERAL_WKUP + 0x00C) -#define OMAP343X_CONTROL_WKUP_DEBOBS2 (OMAP343X_CONTROL_GENERAL_WKUP + 0x010) -#define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014) -#define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018) - -/* 34xx D2D idle-related pins, handled by PM core */ -#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 -#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 - -/* - * REVISIT: This list of registers is not comprehensive - there are more - * that should be added. - */ - -/* - * Control module register bit defines - these should eventually go into - * their own regbits file. Some of these will be complicated, depending - * on the device type (general-purpose, emulator, test, secure, bad, other) - * and the security mode (secure, non-secure, don't care) - */ -/* CONTROL_DEVCONF0 bits */ -#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */ -#define OMAP24XX_USBSTANDBYCTRL (1 << 15) -#define OMAP2_MCBSP2_CLKS_MASK (1 << 6) -#define OMAP2_MCBSP1_FSR_MASK (1 << 4) -#define OMAP2_MCBSP1_CLKR_MASK (1 << 3) -#define OMAP2_MCBSP1_CLKS_MASK (1 << 2) - -/* CONTROL_DEVCONF1 bits */ -#define OMAP243X_MMC1_ACTIVE_OVERWRITE (1 << 31) -#define OMAP2_MMCSDIO2ADPCLKISEL (1 << 6) /* MMC2 loop back clock */ -#define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ -#define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ -#define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ - -/* CONTROL_STATUS bits */ -#define OMAP2_DEVICETYPE_MASK (0x7 << 8) -#define OMAP2_SYSBOOT_5_MASK (1 << 5) -#define OMAP2_SYSBOOT_4_MASK (1 << 4) -#define OMAP2_SYSBOOT_3_MASK (1 << 3) -#define OMAP2_SYSBOOT_2_MASK (1 << 2) -#define OMAP2_SYSBOOT_1_MASK (1 << 1) -#define OMAP2_SYSBOOT_0_MASK (1 << 0) - -/* CONTROL_PBIAS_LITE bits */ -#define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15) -#define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11) -#define OMAP343X_PBIASSPEEDCTRL1 (1 << 10) -#define OMAP343X_PBIASLITEPWRDNZ1 (1 << 9) -#define OMAP343X_PBIASLITEVMODE1 (1 << 8) -#define OMAP343X_PBIASLITESUPPLY_HIGH0 (1 << 7) -#define OMAP343X_PBIASLITEVMODEERROR0 (1 << 3) -#define OMAP2_PBIASSPEEDCTRL0 (1 << 2) -#define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) -#define OMAP2_PBIASLITEVMODE0 (1 << 0) - -/* CONTROL_PROG_IO1 bits */ -#define OMAP3630_PRG_SDMMC1_SPEEDCTRL (1 << 20) - -/* CONTROL_IVA2_BOOTMOD bits */ -#define OMAP3_IVA2_BOOTMOD_SHIFT 0 -#define OMAP3_IVA2_BOOTMOD_MASK (0xf << 0) -#define OMAP3_IVA2_BOOTMOD_IDLE (0x1 << 0) - -/* CONTROL_PADCONF_X bits */ -#define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) -#define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) - -#define OMAP343X_SCRATCHPAD_ROM (OMAP343X_CTRL_BASE + 0x860) -#define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910) -#define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C - -/* AM35XX_CONTROL_IPSS_CLK_CTRL bits */ -#define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0 -#define AM35XX_CPGMAC_VBUSP_CLK_SHIFT 1 -#define AM35XX_VPFE_VBUSP_CLK_SHIFT 2 -#define AM35XX_HECC_VBUSP_CLK_SHIFT 3 -#define AM35XX_USBOTG_FCLK_SHIFT 8 -#define AM35XX_CPGMAC_FCLK_SHIFT 9 -#define AM35XX_VPFE_FCLK_SHIFT 10 - -/*AM35XX CONTROL_LVL_INTR_CLEAR bits*/ -#define AM35XX_CPGMAC_C0_MISC_PULSE_CLR BIT(0) -#define AM35XX_CPGMAC_C0_RX_PULSE_CLR BIT(1) -#define AM35XX_CPGMAC_C0_RX_THRESH_CLR BIT(2) -#define AM35XX_CPGMAC_C0_TX_PULSE_CLR BIT(3) -#define AM35XX_USBOTGSS_INT_CLR BIT(4) -#define AM35XX_VPFE_CCDC_VD0_INT_CLR BIT(5) -#define AM35XX_VPFE_CCDC_VD1_INT_CLR BIT(6) -#define AM35XX_VPFE_CCDC_VD2_INT_CLR BIT(7) - -/*AM35XX CONTROL_IP_SW_RESET bits*/ -#define AM35XX_USBOTGSS_SW_RST BIT(0) -#define AM35XX_CPGMACSS_SW_RST BIT(1) -#define AM35XX_VPFE_VBUSP_SW_RST BIT(2) -#define AM35XX_HECC_SW_RST BIT(3) -#define AM35XX_VPFE_PCLK_SW_RST BIT(4) - -/* - * CONTROL OMAP STATUS register to identify OMAP3 features - */ -#define OMAP3_CONTROL_OMAP_STATUS 0x044c - -#define OMAP3_SGX_SHIFT 13 -#define OMAP3_SGX_MASK (3 << OMAP3_SGX_SHIFT) -#define FEAT_SGX_FULL 0 -#define FEAT_SGX_HALF 1 -#define FEAT_SGX_NONE 2 - -#define OMAP3_IVA_SHIFT 12 -#define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) -#define FEAT_IVA 0 -#define FEAT_IVA_NONE 1 - -#define OMAP3_L2CACHE_SHIFT 10 -#define OMAP3_L2CACHE_MASK (3 << OMAP3_L2CACHE_SHIFT) -#define FEAT_L2CACHE_NONE 0 -#define FEAT_L2CACHE_64KB 1 -#define FEAT_L2CACHE_128KB 2 -#define FEAT_L2CACHE_256KB 3 - -#define OMAP3_ISP_SHIFT 5 -#define OMAP3_ISP_MASK (1<< OMAP3_ISP_SHIFT) -#define FEAT_ISP 0 -#define FEAT_ISP_NONE 1 - -#define OMAP3_NEON_SHIFT 4 -#define OMAP3_NEON_MASK (1<< OMAP3_NEON_SHIFT) -#define FEAT_NEON 0 -#define FEAT_NEON_NONE 1 - - -#ifndef __ASSEMBLY__ -#ifdef CONFIG_ARCH_OMAP2PLUS -extern void __iomem *omap_ctrl_base_get(void); -extern u8 omap_ctrl_readb(u16 offset); -extern u16 omap_ctrl_readw(u16 offset); -extern u32 omap_ctrl_readl(u16 offset); -extern u32 omap4_ctrl_pad_readl(u16 offset); -extern void omap_ctrl_writeb(u8 val, u16 offset); -extern void omap_ctrl_writew(u16 val, u16 offset); -extern void omap_ctrl_writel(u32 val, u16 offset); -extern void omap4_ctrl_pad_writel(u32 val, u16 offset); - -extern void omap3_save_scratchpad_contents(void); -extern void omap3_clear_scratchpad_contents(void); -extern u32 *get_restore_pointer(void); -extern u32 *get_es3_restore_pointer(void); -extern u32 omap3_arm_context[128]; -extern void omap3_control_save_context(void); -extern void omap3_control_restore_context(void); - -#else -#define omap_ctrl_base_get() 0 -#define omap_ctrl_readb(x) 0 -#define omap_ctrl_readw(x) 0 -#define omap_ctrl_readl(x) 0 -#define omap4_ctrl_pad_readl(x) 0 -#define omap_ctrl_writeb(x, y) WARN_ON(1) -#define omap_ctrl_writew(x, y) WARN_ON(1) -#define omap_ctrl_writel(x, y) WARN_ON(1) -#define omap4_ctrl_pad_writel(x, y) WARN_ON(1) -#endif -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_ARCH_CONTROL_H */ - diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index 0d6f076cf748..c8dae02f0704 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -20,7 +20,6 @@ #include #include -#include #include #define DRIVER_NAME "omap-hsuart" -- cgit v1.2.1 From e4cc41d7bc31cbf99fc633e4d3ab708b55696096 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Fri, 8 Oct 2010 11:40:21 -0600 Subject: OMAP: McBSP: Swap CLKS source definition This is just a readability and debugging improvement. As selection bit in DEVCONF register is cleared when using 96 MHz PRCM source and set when using external CLKS pin, change definitions to be sync with these. Signed-off-by: Jarkko Nikula Acked-by: Paul Walmsley Acked-by: Peter Ujfalusi --- arch/arm/plat-omap/include/plat/mcbsp.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 4da6f94ae8e8..e19abf2c8fe7 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -321,8 +321,8 @@ #define FSR_SRC_FSX 1 /* McBSP functional clock sources */ -#define MCBSP_CLKS_PAD_SRC 0 -#define MCBSP_CLKS_PRCM_SRC 1 +#define MCBSP_CLKS_PRCM_SRC 0 +#define MCBSP_CLKS_PAD_SRC 1 /* we don't do multichannel for now */ struct omap_mcbsp_reg_cfg { -- cgit v1.2.1 From 3e57f1626b5febe5cc99aa6870377deef3ae03cc Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 11 Oct 2010 14:18:45 -0700 Subject: omap: dma: Fix buffering disable bit setting for omap24xx An errata workaround for omap24xx is not setting the buffering disable bit 25 what is the purpose but channel enable bit 7 instead. Background for this fix is the DMA stalling issue with ASoC omap-mcbsp driver. Peter Ujfalusi has found an issue in recording that the DMA stall could happen if there were a buffer overrun detected by ALSA and the DMA was stopped and restarted due that. This problem is known to occur on both OMAP2420 and OMAP3. It can recover on OMAP3 after dma free, dma request and reconfiguration cycle. However, on OMAP2420 it seems that only way to recover is a reset. Problem was not visible before the commit c12abc0. That commit changed that the McBSP transmitter/receiver is released from reset only when needed. That is, only enabled McBSP transmitter without transmission was able to prevent this DMA stall problem in receiving side and underlying problem did not show up until now. McBSP transmitter itself seems to no be reason since DMA stall does not recover by enabling the transmission after stall. Debugging showed that there were a DMA write active during DMA stop time and it never completed even when restarting the DMA. Experimenting showed that the DMA buffering disable bit could be used to avoid stalling when using source synchronized transfers. However that could have performance hit and OMAP3 TRM states that buffering disable is not allowed for destination synchronized transfers so subsequent patch will implement a method to complete DMA writes when stopping. This patch is based on assumtion that complete lock-up on OMAP2420 is different but related problem. I don't have access to OMAP2420 errata but I believe this old workaround here is put for a reason but unfortunately a wrong bit was typed and problem showed up only now. Signed-off-by: Jarkko Nikula Signed-off-by: Peter Ujfalusi Acked-by: Manjunath Kondaiah G Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/dma.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h index 098f154f5d41..6f70f7cfe91d 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h @@ -337,6 +337,7 @@ #define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11) #define OMAP_DMA_CCR_EN (1 << 7) +#define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25) #define OMAP_DMA_DATA_TYPE_S8 0x00 #define OMAP_DMA_DATA_TYPE_S16 0x01 -- cgit v1.2.1 From 0e4905c0199d683497833be60a428c784d7575b8 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 11 Oct 2010 14:18:56 -0700 Subject: OMAP3: DMA: Errata i541: sDMA FIFO draining does not finish Implement the suggested workaround for OMAP3 regarding to sDMA draining issue, when the channel is disabled on the fly. This errata affects the following configuration: sDMA transfer is source synchronized Buffering is enabled SmartStandby is selected. The issue can be easily reproduced by creating overrun situation while recording audio. Either introduce load to the CPU: nice -19 arecord -D hw:0 -M -B 10000 -F 5000 -f dat > /dev/null & \ dd if=/dev/urandom of=/dev/null or suspending the arecord, and resuming it: arecord -D hw:0 -M -B 10000 -F 5000 -f dat > /dev/null CTRL+Z; fg; CTRL+Z; fg; ... In case of overrun audio stops DMA, and restarts it (without reseting the sDMA channel). When we hit this errata in stop case (sDMA drain did not complete), at the coming start the sDMA will not going to be operational (it is still draining). This leads to DMA stall condition. On OMAP3 we can recover with sDMA channel reset, it has been observed that by introducing unrelated sDMA activity might also help (reading from MMC for example). The same errata exists for OMAP2, where the suggestion is to disable the buffering to avoid this type of error. On OMAP3 the suggestion is to set sDMA to NoStandby before disabling the channel, and wait for the drain to finish, than configure sDMA to SmartStandby again. Signed-off-by: Peter Ujfalusi Acked-by: Jarkko Nikula Acked-by : Santosh Shilimkar Acked-by : Manjunath Kondaiah G Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/dma.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h index 6f70f7cfe91d..0cce4ca83aa0 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h @@ -337,6 +337,9 @@ #define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11) #define OMAP_DMA_CCR_EN (1 << 7) +#define OMAP_DMA_CCR_RD_ACTIVE (1 << 9) +#define OMAP_DMA_CCR_WR_ACTIVE (1 << 10) +#define OMAP_DMA_CCR_SEL_SRC_DST_SYNC (1 << 24) #define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25) #define OMAP_DMA_DATA_TYPE_S8 0x00 -- cgit v1.2.1