From 99ade1a0f02e086248874d9908def3e8e4539418 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 28 Jun 2013 20:27:04 +0900 Subject: ARM: shmobile: Add r8a7790 CMT00 clock event Add clock event support for CMT0 timer channel 0 to the r8a7790 SoC code. On most ARM mach-shmobile the CMT is hooked up to a 32KHz clock but on r8a7790 a 31.7KHz clock is instead used. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7790.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile/setup-r8a7790.c') diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index bc40a44de127..ece60c635de7 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -21,9 +21,10 @@ #include #include #include -#include #include #include +#include +#include #include #include #include @@ -159,6 +160,25 @@ static struct resource thermal_resources[] __initdata = { thermal_resources, \ ARRAY_SIZE(thermal_resources)) +static struct sh_timer_config cmt00_platform_data = { + .name = "CMT00", + .timer_bit = 0, + .clockevent_rating = 80, +}; + +static struct resource cmt00_resources[] = { + DEFINE_RES_MEM(0xffca0510, 0x0c), + DEFINE_RES_MEM(0xffca0500, 0x04), + DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */ +}; + +#define r8a7790_register_cmt(idx) \ + platform_device_register_resndata(&platform_bus, "sh_cmt", \ + idx, cmt##idx##_resources, \ + ARRAY_SIZE(cmt##idx##_resources), \ + &cmt##idx##_platform_data, \ + sizeof(struct sh_timer_config)) + void __init r8a7790_add_standard_devices(void) { r8a7790_register_scif(SCIFA0); @@ -173,6 +193,7 @@ void __init r8a7790_add_standard_devices(void) r8a7790_register_scif(HSCIF1); r8a7790_register_irqc(0); r8a7790_register_thermal(); + r8a7790_register_cmt(00); } void __init r8a7790_timer_init(void) -- cgit v1.2.1