From 3126c7bc4106c572ef47e2c220df5a00e7973379 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 15 Jul 2010 11:01:17 +0100 Subject: ARM: AMBA: Add pclk definition for platforms using primecells Add a dummy clk definition for the APB pclk signal on all platforms using the AMBA bus infrastructure. This ensures that these platforms continue to work when the core amba bus code controls the APB pclk. Signed-off-by: Russell King --- arch/arm/mach-omap2/clock3xxx_data.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/mach-omap2/clock3xxx_data.c') diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 41b155acfca7..d33744117ce2 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3166,6 +3166,10 @@ static struct clk uart4_ick_am35xx = { .recalc = &followparent_recalc, }; +static struct clk dummy_apb_pclk = { + .name = "apb_pclk", + .ops = &clkops_null, +}; /* * clkdev @@ -3173,6 +3177,7 @@ static struct clk uart4_ick_am35xx = { /* XXX At some point we should rename this file to clock3xxx_data.c */ static struct omap_clk omap3xxx_clks[] = { + CLK(NULL, "apb_pclk", &dummy_apb_pclk, CK_3XXX), CLK(NULL, "omap_32k_fck", &omap_32k_fck, CK_3XXX), CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_3XXX), CLK(NULL, "virt_13m_ck", &virt_13m_ck, CK_3XXX), -- cgit v1.2.1 From 25499d9353e8cc6b0cf205684b3ebc535f8b9372 Mon Sep 17 00:00:00 2001 From: Anand Gadiyar Date: Mon, 26 Jul 2010 16:34:27 -0600 Subject: OMAP3: wait on IDLEST after enabling USBTLL fclk We need to wait on the IDLEST bit after the clocks are enabled before attempting to access any register. Currently, the USBTLL i-clock ops uses the clkops_omap2_dflt_wait, while the USBTLL f-clock ops uses clkops_omap2_dflt. If the i-clock is enabled first, the clkops_omap2_dflt_wait is short-circuited as the companion f-clock is not enabled. This can cause a data abort if the IDLEST has not transitioned, and we try to access a USBTLL register. Since the USBTLL i-clock and f-clock could be enabled in any order, this is a bug. Fix it by changing the clkops for the f-clock. Signed-off-by: Anand Gadiyar Acked-by: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock3xxx_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2/clock3xxx_data.c') diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 41b155acfca7..c226798e9ac6 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -1408,7 +1408,7 @@ static struct clk ts_fck = { static struct clk usbtll_fck = { .name = "usbtll_fck", - .ops = &clkops_omap2_dflt, + .ops = &clkops_omap2_dflt_wait, .parent = &dpll5_m2_ck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, -- cgit v1.2.1