From 1a94acf858000836d28b13942eebf5cbffc9ac34 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Fri, 24 Jul 2015 14:05:06 -0500 Subject: ARM: socfpga: dts: add "altr,modrst-offset" property The "altr,modrst-offset" property represents the offset into the reset manager that is the first register to be used by the driver to bring peripherals out of reset. Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/socfpga_arria10.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/socfpga_arria10.dtsi') diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 4779b07310df..1d341dc3e598 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -588,6 +588,7 @@ #reset-cells = <1>; compatible = "altr,rst-mgr"; reg = <0xffd05000 0x100>; + altr,modrst-offset = <0x20>; }; scu: snoop-control-unit@ffffc000 { -- cgit v1.2.1 From 6855e5b7090330add9521d8947017875d5f4f88e Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Fri, 24 Jul 2015 15:13:17 -0500 Subject: ARM: socfpga: dts: Add resets for EMACs on Arria10 Add the reset property for the EMAC controllers on Arria10. Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/socfpga_arria10.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot/dts/socfpga_arria10.dtsi') diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 1d341dc3e598..98c5506c2a35 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -16,6 +16,7 @@ #include "skeleton.dtsi" #include +#include / { #address-cells = <1>; @@ -409,6 +410,8 @@ rx-fifo-depth = <16384>; clocks = <&l4_mp_clk>; clock-names = "stmmaceth"; + resets = <&rst EMAC0_RESET>; + reset-names = "stmmaceth"; status = "disabled"; }; @@ -426,6 +429,8 @@ rx-fifo-depth = <16384>; clocks = <&l4_mp_clk>; clock-names = "stmmaceth"; + resets = <&rst EMAC1_RESET>; + reset-names = "stmmaceth"; status = "disabled"; }; -- cgit v1.2.1