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* iwlwifi: pcie: Set affinity mask for rx interrupt vectors per cpuHaim Dreyfuss2016-09-162-1/+33
| | | | | | | | | | | | | | | | | In order to utilize the host's CPUs in the most efficient way we bind each rx interrupt vector to each CPU on the host. Each rx interrupt is prioritized to execute only on the designated CPU rather than any CPU. Processor affinity takes advantage of the fact that some remnants of a process that was run on a given processor may remain in that processor's memory state for example, data in the CPU cache after another process is run on that CPU. Scheduling that process to execute on the same processor could result in an efficient use of process by reducing performance-degrading situations such as cache misses and parallel processing. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: Configure shared interrupt vector in MSIX modeHaim Dreyfuss2016-09-163-55/+130
| | | | | | | | | | | | | | In case the OS provides fewer interrupts than requested, different causes will share the same interrupt vector as follow: 1.One interrupt less: non rx causes shared with FBQ. 2.Two interrupts less: non rx causes shared with FBQ and RSS. 3.More than two interrupts: we will use fewer RSS queues. Also make the request depend on the number of online CPUs instead of possible CPUs. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: merge iwl_queue and iwl_txqSara Sharon2016-09-164-163/+146
| | | | | | | | | | The original intent was to have the general iwl_queue shared between RX and TX queues, but it is not the actual status. Since it is not shared with any struct but iwl_txq, it adds unnecessary complexity. Merge those structs. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: change byte count table for a000 devicesSara Sharon2016-09-161-7/+29
| | | | | | | | | | | Since TFD was enlarged to 256 bytes, the fetch of the TFD itself is very expensive. To make DRAM to SRAM more efficient, bits 12-13 will indicate the number of 64 byte chunks that should be transferred to SRAM. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: assign and access a000 TFD & TBsSara Sharon2016-09-163-56/+120
| | | | | | | | Previous patch introduced the new formats. This patch allocates the new structures and adjusts code accordingly. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: introduce trans API to get byte count tableSara Sharon2016-09-163-0/+11
| | | | | | | | | In future HW the byte count table address will be configured by ucode per queue. Add API to expose the byte count table to the opmode Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: introduce new tfd and tb formatsSara Sharon2016-09-153-16/+24
| | | | | | | | | | | New hardware supports bigger TFDs and TBs. Introduce the new formats and adjust defines and code relying on old format. Changing the actual TFD allocation is trickier and deferred to the next patch. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: remove dead codeSara Sharon2016-08-301-8/+0
| | | | | | | | | If device family is 8000 then iwl_pcie_load_cpu_sections() won't be called at all (iwl_pcie_load_cpu_sections_8000() is called in that case) so this piece of code never gets called. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: fix ucode load flow for a000 devicesSara Sharon2016-08-301-8/+25
| | | | | | | | | Turns out we should access TFH relative addresses. Also, the FH_UCODE_LOAD_STATUS was replaced by UREG_UCODE_LOAD_STATUS. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: refrain from SCD accessesSara Sharon2016-08-302-1/+16
| | | | | | | | | | | Up till now we accessed SCD configuration only for initial configuration and for enabling command queue. For a000 generation the command queue is open by default and firmware configures the rest. No driver SCD accesses are expected. Make sure this is the case. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: add the new 9170 seriesOren Givon2016-08-301-0/+1
| | | | | | | | Add a new config struct for the new 9170 series and add the first PCI ID for it. Signed-off-by: Oren Givon <oren.givon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: add the new 9270 seriesOren Givon2016-08-301-0/+1
| | | | | | | | Add a new config struct for the new 9270 series and add the first PCI ID for it. Signed-off-by: Oren Givon <oren.givon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: add new 9460 series PCI IDsOren Givon2016-08-301-0/+4
| | | | | | | Add 4 more new 9460 series PCI IDs. Signed-off-by: Oren Givon <oren.givon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: add a new series 9460 with new PCI IDOren Givon2016-08-301-13/+14
| | | | | | | | Add a new series to the 9000 series called 9460. In addition, add a new PCI ID that is the 9460 new series. Signed-off-by: Oren Givon <oren.givon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: rename and reorder 9000 series configuration structsOren Givon2016-08-301-18/+16
| | | | | | | | Rename and reorder the 9000 series configuration structs: - struct containing configuration of 5165 was renamed to 9000. Signed-off-by: Oren Givon <oren.givon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: move iwl_drv to be shared across transportsSara Sharon2016-07-062-11/+5
| | | | | | | | | All transports has this structure. By moving it to be shared, we can get rid of casting to the specific transport in probe and remove. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: centralize SCD status loggingSara Sharon2016-07-063-73/+47
| | | | | | | | | Centralize the logging of SCD status. The motivation is that for a000 devices we will have new SCD HW, but this code was duplicate anyway, so it is a proper cleanup. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: load FW chunk for a000 devicesSara Sharon2016-07-061-11/+46
| | | | | | | Update the firmware load flow for TFH hardware. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: initialize a000 device's TFD tableSara Sharon2016-07-061-5/+22
| | | | | | | | | | | | For a000 device the FH was replaced by the TFH. This is the first patch in a series introducing the changes stemming from this change. This patch initializes the TFQ queue table with the new 64 bit register and the relevant TFH configuration registers. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: centralize 64 bit HW registers writeSara Sharon2016-07-061-16/+9
| | | | | | | | Move the write_prph_64 of pcie to be transport agnostic. Add direct write as well, as it is needed for a000 HW. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: generalize and increase the size of scratchbufSara Sharon2016-07-062-58/+54
| | | | | | | | | | | | | Currently the scratch buffer is set to 16 bytes and indicates the size of the bi-directional DMA. However, next HW generation will perform additional offloading, and will write the result in the key location of the TX command, so the size of the bi-directional consistent memory should grow accordingly - increase it to 40. Generalize the code to get rid of now irrelevant scratch references. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: track rxb statusSara Sharon2016-07-062-1/+11
| | | | | | | | | | In MQ environment and new architecture in early stages we may encounter DMA issues. Track RXB status and bail out in case we receive index to an RXB that was not mapped and handed over to HW. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: fix a race in firmware loading flowEmmanuel Grumbach2016-07-063-17/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upon firmware load interrupt (FH_TX), the ISR re-enables the firmware load interrupt only to avoid races with other flows as described in the commit below. When the firmware is completely loaded, the thread that is loading the firmware will enable all the interrupts to make sure that the driver gets the ALIVE interrupt. The problem with that is that the thread that is loading the firmware is actually racing against the ISR and we can get to the following situation: CPU0 CPU1 iwl_pcie_load_given_ucode ... iwl_pcie_load_firmware_chunk wait_for_interrupt <interrupt> ISR handles CSR_INT_BIT_FH_TX ISR wakes up the thread on CPU0 /* enable all the interrupts * to get the ALIVE interrupt */ iwl_enable_interrupts ISR re-enables CSR_INT_BIT_FH_TX only /* start the firmware */ iwl_write32(trans, CSR_RESET, 0); BUG! ALIVE interrupt will never arrive since it has been masked by CPU1. In order to fix that, change the ISR to first check if STATUS_INT_ENABLED is set. If so, re-enable all the interrupts. If STATUS_INT_ENABLED is clear, then we can check what specific interrupt happened and re-enable only that specific interrupt (RFKILL or FH_TX). All the credit for the analysis goes to Kirtika who did the actual debugging work. Cc: <stable@vger.kernel.org> [4.5+] Fixes: a6bd005fe92 ("iwlwifi: pcie: fix RF-Kill vs. firmware load race") Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: decouple PCIe transport from mac80211Johannes Berg2016-07-063-19/+27
| | | | | | | | | | | | | | | | | The PCIe transport needs to store two pointers in each TX SKB, and currently assumes mac80211's ieee80211_tx_info is present in the CB to do that. In order to remove that assumption, have the opmodes pass in the offset to where the pointers can be stored in the CB and use the offset in the PCIe code. To make the disentanglement complete, remove mac80211.h includes from everywhere in the generic iwlwifi code. This required adding an include of cfg80211.h in one place. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: don't use vid 0Sara Sharon2016-07-061-4/+7
| | | | | | | | | | | | In cases of hardware or DMA error, the vid read from a zeroed location will be 0, and we will access the rxb at index 0 in the global table, while it may be NULL or owned by hardware. Invalidate vid 0 in order to detect the situation and bail out. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: fix access to scratch bufferSara Sharon2016-07-061-2/+2
| | | | | | | | | | | | | | | | | This fixes a pretty ancient bug that hasn't manifested itself until now. The scratchbuf for command queue is allocated only for 32 slots but is accessed with the queue write pointer - which can be up to 256. Since the scratch buf size was 16 and there are up to 256 TFDs we never passed a page boundary when accessing the scratch buffer, but when attempting to increase the size of the scratch buffer a panic was quick to follow when trying to access the address resulted in a page boundary. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Fixes: 38c0f334b359 ("iwlwifi: use coherent DMA memory for command header") Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: Enable MSI mode when using MSI interruptsIdo Yariv2016-07-061-1/+5
| | | | | | | | | | | On some of the chipsets MSI & INTA interrupts are disabled by default in the HW registers, and need to be explicitly enabled to be used. In case MSI-X isn't used, make sure MSI mode is enabled by setting the relevant HW register. Signed-off-by: Ido Yariv <idox.yariv@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: enable interrupts before releasing the NIC's CPUEmmanuel Grumbach2016-07-061-1/+4
| | | | | | | | | | | | | | | | | | | The NIC's CPU gets started after the firmware has been written to its memory. The first thing it does is to send an interrupt to let the driver know that it is running. In order to get that interrupt, the driver needs to make sure it is not masked. Of course, the interrupt needs to be enabled in the driver before the CPU starts to run. I mistakenly inversed those two steps leading to races which prevented the driver from getting the alive interrupt from the firmware. Fix that. Cc: <stable@vger.kernel.org> [4.5+] Fixes: a6bd005fe92 ("iwlwifi: pcie: fix RF-Kill vs. firmware load race") Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: Add a000 HW family supportHaim Dreyfuss2016-07-061-0/+3
| | | | | | | Add a000 family configuration to iwl-cfg struct Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: poll RFH for RX DMA stopSara Sharon2016-07-061-3/+10
| | | | | | | | Somehow we ended up stopping RX using legacy RX registers even for devices that support RFH. Fix it. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: add new 8265Oren Givon2016-07-061-0/+6
| | | | | | | | | | | | | | | Add 6 new 8265 series PCI IDs: - (0x24FD, 0x1130) - (0x24FD, 0x0130) - (0x24FD, 0x0910) - (0x24FD, 0x0930) - (0x24FD, 0x0950) - (0x24FD, 0x0850) CC: <stable@vger.kernel.org> [4.6+] Signed-off-by: Oren Givon <oren.givon@intel.com> Signed-off-by: David Spinadel <david.spinadel@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: add new 8260 PCI IDsOren Givon2016-07-061-0/+3
| | | | | | | | | | | | Add 3 new 8260 series PCI IDs: - (0x24F3, 0x10B0) - (0x24F3, 0xD0B0) - (0x24F3, 0xB0B0) CC: <stable@vger.kernel.org> [4.1+] Signed-off-by: Oren Givon <oren.givon@intel.com> Signed-off-by: David Spinadel <david.spinadel@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: mvm: support dqa queue sharingLiad Kaufman2016-07-063-0/+13
| | | | | | | | | | | | | | | | | | | | | | | Support DQA queue sharing when no free queue exists for allocation to a STA that already exists. This means that a single queue will serve more than a single TID (although the RA will be the same for all TIDs served). We try to choose the lowest AC possible, to ensure the shared queues have the lowest possible combined AC requirements. The queue to share is chosen only from the same RA's DATA queues as follows (in descending priority): 1. An AC_BE queue 2. Same AC queue 3. Highest AC queue that is lower than new AC 4. Any existing AC (there always is at least 1 DATA queue) If any aggregations existed for any of the TIDs of the shared queue - they are stopped (the FW is notified), but no delBA is sent. Signed-off-by: Liad Kaufman <liad.kaufman@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: unify restock calls on initSara Sharon2016-07-061-15/+13
| | | | | | | | | | | Currently code calls restock for mq devices during the init function, unlike sq where restock is called after init. This causes an harmless but alarming deadlock warning from lockdep, to fix this - unify the init code. Rename the restock functions while at it. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: make sure packet arrived to destined queueSara Sharon2016-07-011-0/+3
| | | | | | | | Add a warning in case packet didn't end up in the HW destined queue. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: allow more than one frame in RB for 9000 devicesSara Sharon2016-07-011-3/+1
| | | | | | | | We now have 9000 devices that support multiple frames in a single RB. Enable it. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: set RB chunk size per busSara Sharon2016-07-011-2/+6
| | | | | | | | | | | For 9000 devices we can have PCIe bus for discrete devices and IOSF bus for integrated devices. PCIe supports maximum transfer size of 128B while IOSF bus supports maximum transfer size of 64B. Configure RB size accordingly. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: workaround HW shadow registers bugSara Sharon2016-07-013-6/+27
| | | | | | | | | | | | | | | | | | | Integrated 9000 devices have a bug with shadow registers value retention. If driver writes RBD registers while MAC is asleep the values are stored in shadow registers to be copied whenever MAC wakes up. However, in 9000 devices a MAC wakeup is not triggered and when the bus powers down due to inactivity the shadow values and dirty bits are lost. Turn on the chicken-bits that cause MAC wakeup for RX-related values as well when the device is in D0. When the device is in low power mode turn the RX wakeup chicken bits off since driver is idle and this W/A is not needed. Remove previous W/A which was ineffective. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: grab NIC access only once on RX initSara Sharon2016-05-101-40/+57
| | | | | | | | When initializing RX we grab NIC access for every read and write. This is redundant - we can just grab access once. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: use shadow registers for updating write pointerSara Sharon2016-05-101-2/+2
| | | | | | | | | | The RX queues have a shadow register for the write pointer that enables updates without grabbing NIC access. Use them instead of the periphery registers because accessing those is much more expensive. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: avoid msleep() with short timeoutJohannes Berg2016-05-101-2/+2
| | | | | | | | Since msleep is based on jiffies, it can sleep for a long time. Use usleep_range() instead to shorten the maximum time. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: extend device reset delayJohannes Berg2016-05-101-9/+5
| | | | | | | | | | | | | | | Newer hardware generations will take longer to be accessible again after reset, so we need to wait longer before continuing any flow that did a reset. Rather than make the wait time configurable, simply extend it for all. Since all of these code paths can sleep, use usleep_range() rather than mdelay(). Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: make configuration structs smallerJohannes Berg2016-05-101-3/+2
| | | | | | | | | Since we have a lot of configuration structs (almost 70) saving some memory in each one of them leads to an overall saving of ~2.6KiB of memory. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: pcie: don't wake up the NIC when writing CSRs in MSIX modeHaim Dreyfuss2016-05-101-5/+5
| | | | | | | | | | CSR registers are always available even when the NIC is not awake, no need to wake up the NIC before accessing them. This has a huge impact when we re-enable an interrupt at the end of the ISR since waking up the NIC can take some time. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: allow combining different phy images with mac imagesHaim Dreyfuss2016-05-102-0/+12
| | | | | | | | | | Currently there is one to one function between device id to it's ucode. The new generation devices allows to combine different phy and mac images. Now we have two different ucode images with the same device id. Read RF ID to identify phy image and overwrite it if needed. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: wake from runtime suspend before sending sync commandsLuca Coelho2016-05-101-0/+11
| | | | | | | | | | | | If a host command was queued while in runtime suspend, it would go out before the D0I3_END_CMD was sent. Sometimes it works, but sometimes it fails, and it is obviously the wrong thing to do. To fix this, have the opmode take a reference before sending a SYNC command and make the pcie trans wait for the runtime state to become active before actually queueing the command. Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: Rename 9560 to 9260 and add new PCI IDs for itHaim Dreyfuss2016-05-101-10/+11
| | | | | | | | | Rename 9560 to 9260. Add new PCI ID for 9260 and change some entries from 5165 to 9260. Also order the 9000 series. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* iwlwifi: trans: don't call the trans-specific ref/unref directlyLuca Coelho2016-05-103-10/+7
| | | | | | | | | | It's cleaner to always call the iwl_trans_ref/unref() functions instead of sometimes calling the trans-specific ops directly. This also prepares for moving some of the code from the trans-specific ops to the common trans code. Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
* Merge tag 'iwlwifi-for-kalle-2016-05-04' of ↵Luca Coelho2016-05-102-2/+12
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-fixes * fix P2P rates (and possibly other issues) Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
| * iwlwifi: add device IDs for the 8265 deviceOren Givon2016-04-121-0/+10
| | | | | | | | | | | | | | Add new 8265 series PCI IDs. Signed-off-by: Oren Givon <oren.givon@intel.com> Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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