summaryrefslogtreecommitdiffstats
path: root/drivers/mtd
Commit message (Collapse)AuthorAgeFilesLines
...
| | * | mtd: rawnand: Create a legacy struct and move ->IO_ADDR_{R, W} thereBoris Brezillon2018-10-0320-126/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We regularly have new NAND controller drivers that are making use of fields/hooks that we want to get rid of but can't because of all the legacy drivers that we might break if we do. So, instead of removing those fields/hooks, let's move them to a sub-struct which is clearly documented as deprecated. We start with the ->IO_ADDR_{R,W] fields. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Leave chip->IO_ADDR_{R, W} to NULL when unusedBoris Brezillon2018-10-032-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no point in poisoning the ->IO_ADDR_{R,W}, a NULL pointer is just as good to detect unexpected ->IO_ADDR_{R,W} usage. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Do not treat !maxchips specially in nand_scan_with_ids()Boris Brezillon2018-10-031-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only reason we were skipping nand_scan_ident() when maxchips == 0 was to make the docg4 to work. Now that this driver is gone we can remove this special case and return an error when maxchips is 0. Suggested-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Make maxchips an unsigned intBoris Brezillon2018-10-031-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no good reason to make maxchips a signed integer, since only positive values are valid. Make it an unsigned int. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Remove docg4Boris Brezillon2018-10-033-1458/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The diskonchip G4 driver does not fit very well in the raw/parallel NAND framework simply because such chips have an internal controller translating DoC-specific commands into NAND ones. Keeping such a driver in the raw NAND framework is a real burden for NAND maintainers. Not to mention that some parts of this driver are a bit worrisome: - writes are done by subpages, even though we're interfacing with an MLC chip which are known to not support subpage writes very well (it might be that the FTL handles the complexity for us though) - some part of the code are simply ignoring return codes of function that can fail in a few occasions - there's a hack to support OOB writes when no data is provided. This operation is not supported by the chip and should have been rejected, and nandwrite and other userspace tools should have been patched to deal with such devices - the driver is apparently broken when ignore_badblocks module param is not set to 1 and nobody noticed that (don't know since when this is the case, but it's not a recent change) http://lists.infradead.org/pipermail/linux-mtd/2018-July/082472.html Add to that the fact that we already have a docg3 driver in drivers/mtd/devices/docg3.c and, looking at the code (and regs), it seems docg3 and docg4 have a lot in common (even the author of this driver seemed to have realized that interfacing with the raw NAND framework might have been a bad idea http://lists.infradead.org/pipermail/linux-mtd/2012-January/039517.html). For all these reasons, I'm proposing to remove this driver. If anyone ever wants to add support for this chip back, I'd suggest extending the docg3 driver instead of adding a completely new driver. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Cc: Mike Dunn <mikedunn@newsguy.com> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Cc: Sergey Larin <cerg2010cerg2010@mail.ru> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: marvell: support 8b/512B strength for 2kiB pages layoutMiquel Raynal2018-10-031-3/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the layout used by 2kiB page NAND chips requesting at least 8-bit of correction per 512 bytes. This layout requires a bit of handling as: 1/ It can only fit if the NAND chip has at least 128 OOB bytes. 2/ The Bad Block Markers are located in the middle of the data bytes and shall not be used. 3/ It has been experimentally observed that, for certain layouts, the ECC engine tries to correct data while it should not because the errors are uncorrectable. While this is harmless for truly bad pages, it creates bitflips in empty pages. To avoid such scenario that augments artificially the number of bitflips we re-read in raw mode the entire page instead of just the ECC bytes. This is done only for this layout to avoid an unneeded penalty with other setups. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
| | * | mtd: rawnand: marvell: rework BCH engine failure pathMiquel Raynal2018-10-031-31/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are about to support a new layout that triggers a faulty mechanism in BCH engine that creates bitflips in erased pages. Before adding the quirk that will workaround this issue, this patch just reworks a bit the section that handles ECC failures in BCH read path. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object nand_erase_nand()Boris Brezillon2018-10-032-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the nand_erase_nand() helper. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to all nand_xxx_bbt() helpersBoris Brezillon2018-10-032-12/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the nand_xxx_bbt() helpers. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->setup_data_interface()Boris Brezillon2018-10-0313-30/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->setup_data_interface() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->setup_read_retry()Boris Brezillon2018-10-033-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->setup_read_retry() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->{get, set}_features()Boris Brezillon2018-10-032-23/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->{get,set}_features() hooks. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->erase()Boris Brezillon2018-10-033-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->erase() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->waitfunc()Boris Brezillon2018-10-0313-55/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->waitfunc() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->cmdfunc()Boris Brezillon2018-10-0316-61/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->cmdfunc() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->dev_ready()Boris Brezillon2018-10-0336-87/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->dev_ready() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->cmd_ctrl()Boris Brezillon2018-10-0334-124/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->cmd_ctrl() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->block_xxx() hooksBoris Brezillon2018-10-038-23/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all chip->block_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->select_chip()Boris Brezillon2018-10-0332-143/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->select_chip() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->write_xxx() hooksBoris Brezillon2018-10-0340-199/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all chip->write_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to chip->read_xxx() hooksBoris Brezillon2018-10-0340-240/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all chip->read_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to ecc->write_xxx() hooksBoris Brezillon2018-10-0324-194/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all ecc->write_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to ecc->read_xxx() hooksBoris Brezillon2018-10-0326-205/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all ecc->read_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to ecc->correct()Boris Brezillon2018-10-0314-48/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one. Now is ecc->correct()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to ecc->calculate()Boris Brezillon2018-10-0317-61/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one. Now is ecc->calculate()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to ecc->hwctl()Boris Brezillon2018-10-0316-52/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one. Now is ecc->hwctl()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to nand_wait_ready()Boris Brezillon2018-10-033-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers to take a nand_chip object instead of an mtd_info one. Now is nand_wait_ready()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to nand_release()Boris Brezillon2018-10-0347-73/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers to take a nand_chip object instead of an mtd_info one. Now is nand_release()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Pass a nand_chip object to nand_scan()Boris Brezillon2018-10-0349-59/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers to take a nand_chip object instead of an mtd_info one. We start with nand_scan(). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: plat_nand: Pass a nand_chip object to all platform_nand_ctrl hooksBoris Brezillon2018-10-031-5/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. In order to do that, we first need to update the platform_nand_ctrl hooks to take a nand_chip object instead of an mtd_info. We add temporary plat_nand_xxx() wrappers to the do the mtd -> chip conversion, but those will be dropped when patching nand_chip hooks to take a nand_chip object. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Krzysztof Halasa <khalasa@piap.pl> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: atmel: use struct_size() in devm_kzalloc()Gustavo A. R. Silva2018-09-041-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct foo { int stuff; void *entry[]; }; instance = devm_kzalloc(dev, sizeof(struct foo) + sizeof(void *) * count, GFP_KERNEL); Instead of leaving these open-coded and prone to type mistakes, we can now use the new struct_size() helper: instance = devm_kzalloc(dev, struct_size(instance, entry, count), GFP_KERNEL); This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: jz4780: use struct_size() in devm_kzalloc()Gustavo A. R. Silva2018-09-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct foo { int stuff; void *entry[]; }; instance = devm_kzalloc(dev, sizeof(struct foo) + sizeof(void *) * count, GFP_KERNEL); Instead of leaving these open-coded and prone to type mistakes, we can now use the new struct_size() helper: instance = devm_kzalloc(dev, struct_size(instance, entry, count), GFP_KERNEL); Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Convert to using %pOFn instead of device_node.nameRob Herring2018-09-042-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to remove the node name pointer from struct device_node, convert printf users to use the %pOFn format specifier. Cc: Boris Brezillon <boris.brezillon@bootlin.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: qcom: don't include dma-direct.hChristoph Hellwig2018-09-041-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent commit removed the incorrect use of phys_to_dma from this driver, but failed to remove the dma-direct.h include, so do that now. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: denali: use SPDX-License-Identifier and fix license mismatchMasahiro Yamada2018-09-044-38/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use SPDX-License-Identifier instead of the license boilerplates. This conversion makes it easier for us to scan the license, then I notice license mismatch problems. The license blocks in denali* indicate GPL-2.0 "only", while the MODULE_LICENSE in denali.c and denali_dt.c is GPL-2.0 "or later" as explained in include/linux/module.h as follows: "GPL" [GNU Public License v2 or later] "GPL v2" [GNU Public License v2] I fixed the MODULE_LICENSE tags, assuming the license blocks are the authors' intention. Also, add missing MODULE_DESCRIPTION/AUTHOR to denali.c While I am touching the license things, I added my credit to denali.c because this driver was largely re-written by me in 2017. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: fsl_ifc: fixup SRAM init for newer ctrl versionsKurt Kanzenbach2018-09-041-7/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of the IFC controller use a different method of initializing the internal SRAM: Instead of reading from flash, a bit in the NAND configuration register has to be set in order to trigger the self-initializing process. Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: fsl_ifc: check result of SRAM initializationKurt Kanzenbach2018-09-041-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SRAM initialization might fail. If that happens further NAND operations won't be successful. Therefore, the chip init routine should fail if the SRAM initialization didn't work. Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: marvell: document a bit more the driverMiquel Raynal2018-09-041-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A stale document about the old pxa3cc_nand.c driver is available in Documentation/mtd/nand/. Rewrite the parts that explain the IP itself and some non-trivial choices made in the driver directly in marvell_nand.c to then be able to remove this file. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
| | * | mtd: rawnand: toshiba: Add support for Toshiba Memory BENAND (Built-in ECC NAND)KOBAYASHI Yoshitake2018-09-041-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is a patch to support TOSHIBA MEMORY CORPORATION BENAND memory devices. Check the status of the built-in ECC with the Read Status command without using the vendor specific command. The Read Status command only knows whether there was bitflips above the threshold and can not get accurate bitflips. For now, I set max_bitflips mtd->bitflip_threshold. Signed-off-by: KOBAYASHI Yoshitake <yoshitake.kobayashi@toshiba.co.jp> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: marvell: use regmap_update_bits() for syscon accessThomas Petazzoni2018-09-041-12/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The marvell_nfc_init() function fiddles with some bits of a system controller on Armada 7K/8K. However, it does a read/modify/write sequence on GENCONF_CLK_GATING_CTRL and GENCONF_ND_CLK_CTRL, which isn't safe from a concurrency point of view, as the regmap lock isn't taken accross the read/modify/write sequence. To solve this issue, use regmap_update_bits(). While at it, since the "reg" variable is no longer needed for the read/modify/write sequences, get rid of it for the regmap_write() to GENCONF_SOC_DEVICE_MUX, and directly pass the value to be written as argument. Fixes: 02f26ecf8c772 ("mtd: nand: add reworked Marvell NAND controller driver") Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Get rid of the ->read_word() hookBoris Brezillon2018-09-0410-114/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c120e75e0e7d ("mtd: nand: use read_oob() instead of cmdfunc() for bad block check") removed this only user of the ->read_word() method but kept the hook in place. Remove it now. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Add the nand_wait_rdy_op() helper and use itBoris Brezillon2018-09-041-5/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to make sure we use ->exec_op() to wait for chip readiness when it's available we provide an helper that does the selection between ->exec_op(), udelay(chip->chip_delay) and nand_wait_ready() based on what's implemented by the controller driver. We then use it in nand_wait_readrdy(). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| | * | mtd: rawnand: Add the nand_wait_readrdy() helper and use itBoris Brezillon2018-09-041-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The logic to wait for chip readiness after a page read has been duplicated in nand_do_read_ops() and nand_do_read_oob(). Provide an helper that does the right thing and call it where appropriate. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * | | Merge tag 'spi-nor/for-4.20' of git://git.infradead.org/linux-mtd into mtd/nextBoris Brezillon2018-10-195-86/+882
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Core changes: * Support non-uniform erase size * Support controllers with limited TX fifo size Driver changes: * m25p80: Re-issue a WREN command after each write access * cadence: Pass a proper dir value to dma_[un]map_single() * fsl-qspi: Check fsl_qspi_get_seqid() return val make sure 4B addressing opcodes are properly handled * intel-spi: Add a new PCI entry for Ice Lake
| | * | | mtd: spi-nor: fsl-quadspi: fix read error for flash size larger than 16MBLiu Xiang2018-10-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the size of spi-nor flash is larger than 16MB, the read_opcode is set to SPINOR_OP_READ_1_1_4_4B, and fsl_qspi_get_seqid() will return -EINVAL when cmd is SPINOR_OP_READ_1_1_4_4B. This can cause read operation fail. Fixes: e46ecda764dc ("mtd: spi-nor: Add Freescale QuadSPI driver") Cc: <stable@vger.kernel.org> Signed-off-by: Liu Xiang <liu.xiang6@zte.com.cn> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
| | * | | mtd: spi-nor: intel-spi: Add support for Intel Ice Lake SPI serial flashMika Westerberg2018-10-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Ice Lake exposes the SPI serial flash controller as a PCI device in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI ID to the driver list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
| | * | | mtd: spi-nor: fsl-quadspi: Don't let -EINVAL on the busAhmad Fatoum2018-10-081-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fsl_qspi_get_seqid() may return -EINVAL, but fsl_qspi_init_ahb_read() doesn't check for error codes with the result that -EINVAL could find itself signalled over the bus. In conjunction with the LS1046A SoC's A-009283 errata ("Illegal accesses to SPI flash memory can result in a system hang") this illegal access to SPI flash memory results in a system hang if userspace attempts reading later on. Avoid this by always checking fsl_qspi_get_seqid()'s return value and bail out otherwise. Fixes: e46ecda764dc ("mtd: spi-nor: Add Freescale QuadSPI driver") Cc: stable@vger.kernel.org Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
| | * | | mtd: devices: m25p80: Make sure WRITE_EN is issued before each writeYogesh Gaur2018-10-081-15/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SPI controllers can't write nor->page_size bytes in a single step because their TX FIFO is too small, but when that happens we should make sure a WRITE_EN command before each write access and READ_SR command after each write access is issued. The core is already taking care of that, so all we have to do here is return the actual number of bytes that were written during the spi_mem_exec_op() operation. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
| | * | | mtd: spi-nor: Support controllers with limited TX FIFO sizeYogesh Gaur2018-10-081-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SPI controllers can't write nor->page_size bytes in a single step because their TX FIFO is too small. Allow nor->write() to return a size that is smaller than the requested write size to gracefully handle this case. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
| | * | | mtd: spi-nor: cadence-quadspi: Use proper enum for dma_[un]map_singleNathan Chancellor2018-10-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clang warns when one enumerated type is converted implicitly to another. drivers/mtd/spi-nor/cadence-quadspi.c:962:47: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] dma_dst = dma_map_single(nor->dev, buf, len, DMA_DEV_TO_MEM); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~ ./include/linux/dma-mapping.h:428:66: note: expanded from macro 'dma_map_single' ~~~~~~~~~~~~~~~~~~~~ ^ drivers/mtd/spi-nor/cadence-quadspi.c:997:43: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] dma_unmap_single(nor->dev, dma_dst, len, DMA_DEV_TO_MEM); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~ ./include/linux/dma-mapping.h:429:70: note: expanded from macro 'dma_unmap_single' ~~~~~~~~~~~~~~~~~~~~~~ ^ 2 warnings generated. Use the proper enums from dma_data_direction to satisfy Clang. DMA_FROM_DEVICE = DMA_DEV_TO_MEM = 2 Link: https://github.com/ClangBuiltLinux/linux/issues/108 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
OpenPOWER on IntegriCloud