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path: root/drivers/gpu/drm/nouveau/nv04_fifo.c
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* drm/nv50: check for vm traps on every gr irqBen Skeggs2011-03-141-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: decode PFIFO DMA_PUSHER error codesMarcin Slusarz2011-02-251-3/+14
| | | | | Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: make fifo.create_context() responsible for mapping control regsBen Skeggs2010-12-081-0/+9
| | | | | | | | The regs belong to PFIFO, they're different for pretty much the same generations we need different PFIFO control for, and NVC0 is going to be even more different than the rest. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: move PFIFO ISR into nv04_fifo.cBen Skeggs2010-12-031-0/+206
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Refactor context destruction to avoid a lock ordering issue.Francisco Jerez2010-12-031-2/+19
| | | | | | | | | | | | | | | | The destroy_context() engine hooks call gpuobj management functions to release the channel resources, these functions use HARDIRQ-unsafe locks whereas destroy_context() is called with the HARDIRQ-safe context_switch_lock held, that's a lock ordering violation. Push the engine-specific channel destruction logic into destroy_context() and let the hardware-specific code lock and unlock when it's actually needed. Change the engine destruction order to avoid a race in the small gap between pgraph and pfifo context uninitialization. Reported-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: add more fine-grained locking to channel list + structuresBen Skeggs2010-12-031-2/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Simplify tile region handling.Francisco Jerez2010-09-241-25/+20
| | | | | | | | | Instead of emptying the caches to avoid a race with the PFIFO puller, go straight ahead and try to recover from it when it happens. Also, kill pfifo->cache_flush and tile->lock, we don't need them anymore. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: tidy ram{ht,fc,ro} a bitBen Skeggs2010-09-241-5/+6
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: remove nouveau_gpuobj_ref completely, replace with sanityBen Skeggs2010-09-241-7/+5
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: modify object accessors, offset in bytes rather than dwordsBen Skeggs2010-09-241-4/+4
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv04: Enable context switching on PFIFO init.Francisco Jerez2010-07-131-0/+1
| | | | | | | Fixes a lockup when coming back from suspend. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: add instmem flush() hookBen Skeggs2010-07-131-8/+0
| | | | | | | | | | This removes the previous prepare_access() and finish_access() hooks, and replaces it with a much simpler flush() hook. All the chipset-specific code before nv50 has its use removed completely, as it's not required there at all. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Fix a couple of sparse warnings.Francisco Jerez2010-07-131-4/+7
| | | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: protect channel create/destroy and irq handler with a spinlockMaarten Maathuis2010-02-251-0/+5
| | | | | | | | | The nv50 pgraph handler (for example) could reenable pgraph fifo access and that would be bad when pgraph context is being unloaded (we need the guarantee a ctxprog isn't running). Signed-off-by: Maarten Maathuis <madman2003@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Add cache_flush/pull fifo engine functions.Francisco Jerez2010-01-111-0/+34
| | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net>
* drm/nouveau: Add DRM driver for NVIDIA GPUsBen Skeggs2009-12-111-0/+271
This adds a drm/kms staging non-API stable driver for GPUs from NVIDIA. This driver is a KMS-based driver and requires a compatible nouveau userspace libdrm and nouveau X.org driver. This driver requires firmware files not available in this kernel tree, interested parties can find them via the nouveau project git archive. This driver is reverse engineered, and is in no way supported by nVidia. Support for nearly the complete range of nvidia hw from nv04->g80 (nv50) is available, and the kms driver should support driving nearly all output types (displayport is under development still) along with supporting suspend/resume. This work is all from the upstream nouveau project found at nouveau.freedesktop.org. The original authors list from nouveau git tree is: Anssi Hannula <anssi.hannula@iki.fi> Ben Skeggs <bskeggs@redhat.com> Francisco Jerez <currojerez@riseup.net> Maarten Maathuis <madman2003@gmail.com> Marcin Kościelnicki <koriakin@0x04.net> Matthew Garrett <mjg@redhat.com> Matt Parnell <mparnell@gmail.com> Patrice Mandin <patmandin@gmail.com> Pekka Paalanen <pq@iki.fi> Xavier Chantry <shiningxc@gmail.com> along with project founder Stephane Marchesin <marchesin@icps.u-strasbg.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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